This error message indicates that the protocol connection to the DSL Slave has been re-
initialized. This error message can be caused by a frequency inverter application
request (PRST bit in SYS_CTRL), generated by the DSL Master itself, or activated via the
rst input.
The DSL Master causes a protocol reset if too many transmission errors indicate a con‐
nection problem (see chapter 6.3.3). A protocol reset causes a re-synchronization with
the DSL Slave that can improve the connection quality.
Register 05h:
Low Byte events
X-0 X-0 R/C-0 R/C-0 R/C-0 R/C-0 R/C-0 X-0
MIN ANS QMLW FREL
Bit 7 Bit 0
Bit 7-6 Not implemented: Read as "0".
Bit 5 MIN: Message initialization
1 = An acknowledgment was received from the Slave for the initialization of a message.
0 = No acknowledgment for the initialization received.
When this warning is displayed, the Parameters Channel is still in the initialization sta‐
tus and no "short message" or "long message" can be triggered.
This bit is level sensitive.
Bit 4 ANS: Erroneous answer to "long message"
1 = An error occurred during the answer to a long message. The effectiveness of the
previous transaction is not known.
0 = The last answers to "long messages" were error free.
This error indicates that the transmission of an answer from the DSL Slave to the last
"long message" failed. The frequency inverter application must send the "long mes‐
sage" again.
Bit 3 Not implemented: Read as "0".
Bit 2 QMLW: Quality monitoring low value warning
1 = Quality monitoring value (see register 03h) below "14"
0 = Quality monitoring value greater than or equal to "14"
This warning indicates that a transmission error occurred at bit level for one of the CRC
values. If this error occurs frequently, the wiring of the DSL connection should be
checked (also see chapter 6.3.3).
Bit 1 FREL: Channel free for "long message"
1 = A "long message" can be sent on the Parameters Channel.
0 = No "long message" can be sent.
If the bit is set, the frequency inverter application can trigger a "long message". Pro‐
vided no answer has been received from the DSL Slave, this bit remains deleted. As the
processing duration of a "long message" in the motor feedback system is not specified,
a user time limit condition should be installed via the frequency inverter application.
When a time limit is exceeded, the MRST bit in the SYS_CTRL register is set, which
causes the Parameters Channel to be reset.
Bit 0
FRES: Channel free for "short message"
1 = A "short message" can be sent on the Parameters Channel.
0 = No "short message" can be sent.
6
REGISTER MAP
38
T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL
®
8017595/ZTW6/2018-01-15 | SICK
Subject to change without notice
To Next Page
Loading...
