Siemens 7SR18 Solkor - Page 358

7SR18 Applications Guide
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List of Figures
Figure 1.1-1 Example Use of Alternative Settings Groups ................................................................................... 7
Figure 1.2.1-1 Example of Transformer Alarm and Trip Wiring ............................................................................. 8
Figure 1.2.4-1 Binary Input Configurations Providing Compliance with EATS 48-4 Classes ESI 1
and ESI 2 ................................................................................................................................... 11
Figure 1.4-1 LED configuration via the LED Matrix tab ...................................................................................... 12
Figure 1.4-2 LED configuration via the Settings \ OUTPUT CONFIG \ LED CONFIG menu ................................ 12
Figure 2.1-1 IEC NI Curve with Time Multiplier and Follower DTL Applied .......................................................... 13
Figure 2.1-2 IEC NI Curve with Minimum Operate Time Setting Applied ............................................................ 14
Figure 2.1.2-1 Reset Delay............................................................................................................................... 15
Figure 2.3-1 General Form of DTL Operate Characteristic ................................................................................. 16
Figure 2.3-2 Blocking Scheme Using Instantaneous Over-current Elements ...................................................... 17
Figure 2.6-1 Thermal Overload Heating and Cooling Characteristic ................................................................... 18
Figure 4.3-1 Relay Amplitude for CT Saturation for an external Phase Fault ...................................................... 23
Figure 5.3.1-1 Fault Level and X/R reducing with feeder length ......................................................................... 28
Figure 6.1-1 Relay Protected Zones ................................................................................................................. 31
Figure 6.3-1 Output Matrix Protection Comms Alarm / Virtual Mapping .............................................................. 32
Figure 6.3-2 Protection Comms Alarm settings ................................................................................................. 32
Figure 6.3-3 Quick Logic Equation E1 Programming ......................................................................................... 33
Figure 6.3-4 Output Matrix Equation E1 / Virtual 2 & LED Mapping .................................................................... 33
Figure 6.3-5 Input Matrix Equation Virtual / Overcurrent Inhibit 51-1 & 50-1 with Alarm 1 Mapping ...................... 33
Figure 6.3-6 General Alarm 1 & Overcurrent Inhibit suitable text ........................................................................ 33
Figure 6.4-1 Output Matrix Element Mapping .................................................................................................... 34
Figure 6.4-2 Quick Logic Equation .................................................................................................................... 34
Figure 6.4-3 Output Matrix Equation / BO Mapping ........................................................................................... 34
Figure 6.6-1 Inter-trip via Differential IT (87R) ................................................................................................... 35
Figure 6.6.1-1 Local Relay Output Matrix Mapping ............................................................................................ 36
Figure 6.6.1-2 Local Relay Input Matrix Mapping............................................................................................... 36
Figure 6.6.1-3 Remote Relay Output Matrix Mapping ........................................................................................ 36
Figure 6.6.2-1 Local Relay Function Key Programming for Local CB Control ..................................................... 37
Figure 6.6.2-2 Local Relay Binary Output Mapping for Local CB Control ............................................................ 37
Figure 6.6.2-3 Local Relay Quick Logic E1 & E2 Programming .......................................................................... 38
Figure 6.6.2-4 Local Relay Suitable Text for Function Key Operation Description ............................................... 38
Figure 6.6.2-5 Local Relay E1 & E2 Output Matrix Mapping to Virtual Connections ............................................ 39
Figure 6.6.2-6 Local Relay Input Matrix Mapping Inter-trip 85S-5 & 85S-6 to Remote Relay ............................... 39
Figure 6.6.2-7 Remote Relay Output Matrix Inter-trip Mapping 85R-5 & 85R-6 to BO4 & BO5 ............................ 39
Figure 7.5.2-1 Earth Fault with load bias for Resistance Earthed System ........................................................... 43
Figure 7.5.2-2 Setting of P/F Diff. Setting for Load Bias ..................................................................................... 44
Figure 7.5.2-3 Setting of Bias Slope for Load Bias ............................................................................................ 44
Figure 7.5.2-4 Settings for correct Load Bias .................................................................................................... 45
Figure 7.5.2-5 Setting of Bias Break Point for Load Bias.................................................................................... 45
Figure 7.5.2-6 10% P/F Differential and Bias Break Point of 0.5, 1.0, 1.5 and 2.0 ............................................... 46
Figure 7.5.2-7 15% Differential and Bias Break Point of 0.5, 1.0, 1.5 and 2.0 ..................................................... 46
Figure 7.5.2-8 20% Differential and Bias Break Point of 0.5, 1.0, 1.5 and 2.0 ..................................................... 47
Figure 8.1-1 Sequence Co-ordination ............................................................................................................. 48
Figure 8.1.1-1Events pulses ............................................................................................................................. 49
Figure 8.1.1-2Sequence of events .................................................................................................................... 49
Figure 8.1.1-3Function Selection ...................................................................................................................... 50
Figure 8.1.1-4Protection Comms / Intertrip Enable Configuration ....................................................................... 50
Figure 8.1.1-5Overcurrent 51-1 Element Parameterisation ................................................................................ 51
Figure 8.1.1-6Overcurent 50-1 Element Parameterisation ................................................................................. 51
Figure 8.1.1-7Autoreclose Overcurrent Element Configuration .......................................................................... 51
Figure 8.1.1-8Autoreclose Sequence Configuration .......................................................................................... 52
Figure 8.1.1-9Line Differential Element Parameterisation .................................................................................. 52
Figure 8.1.1-10 Auto-Reclose Line Differential Protection ............................................................................ 52
Figure 8.1.1-11 Auto-Reclose Configuration ................................................................................................ 53
Figure 8.1.1-12 P/F Shot Configuration ....................................................................................................... 53
Figure 8.1.2-1Scheme with Remote Close Sequence of events ......................................................................... 54
Figure 8.1.2-2Local CB Input Mapping ............................................................................................................. 54
Figure 8.1.2-3Remote CB Output Mapping ....................................................................................................... 55
Figure 8.1.2-4Remote CB Output Mapping ....................................................................................................... 55
Figure 8.1.3-1Scheme with Guard Sequence of events ..................................................................................... 56
Figure 9.1-1 Circuit Breaker Fail ....................................................................................................................... 57
Figure 9.1.1-1 Single Stage Circuit Breaker Fail Timing ..................................................................................... 58
Figure 9.1.1-2 Two Stage Circuit Breaker Fail Timing ........................................................................................ 58
Figure 9.3.1-1 Trip Circuit Supervision Scheme 1 (H5) ...................................................................................... 60