PM0214 Rev 9 89/262
PM0214 The STM32 Cortex-M4 instruction set
261
3.5.6 MOV and MVN
Move and Move NOT.
Syntax
MOV{S}{cond} Rd, Operand2
MOV{cond} Rd, #imm16
MVN{S}{cond} Rd, Operand2
Where:
• ‘S’ is an optional suffix. If S is specified, the condition code flags are updated on the
result of the operation (see Conditional execution on page 65).
• ‘cond’ is an optional condition code (see Conditional execution on page 65).
• ‘Rd’ is the destination register.
• ‘Operand2’ is a flexible second operand (see Flexible second operand on page 60) for
details of the options.
• ‘imm16’ is any value in the range 0—65535.
Operation
The MOV instruction copies the value of operand2 into Rd.
When operand2 in a MOV instruction is a register with a shift other than LSL #0, the
preferred syntax is the corresponding shift instruction:
• ASR{S}{cond} Rd, Rm, #n is the preferred syntax for MOV{S}{cond} Rd, Rm, ASR #n
• LSL{S}{cond} Rd, Rm, #n is the preferred syntax for MOV{S}{cond} Rd, Rm, LSL #n if n
!= 0
• LSR{S}{cond} Rd, Rm, #n is the preferred syntax for MOV{S}{cond} Rd, Rm, LSR #n
• ROR{S}{cond} Rd, Rm, #n is the preferred syntax for MOV{S}{cond} Rd, Rm, ROR #n
• RRX{S}{cond} Rd, Rm is the preferred syntax for MOV{S}{cond} Rd, Rm, RRX
Also, the MOV instruction permits additional forms of operand2 as synonyms for shift
instructions:
• MOV{S}{cond} Rd, Rm, ASR Rs is a synonym for ASR{S}{cond} Rd, Rm, Rs
• MOV{S}{cond} Rd, Rm, LSL Rs is a synonym for LSL{S}{cond} Rd, Rm, Rs
• MOV{S}{cond} Rd, Rm, LSR Rs is a synonym for LSR{S}{cond} Rd, Rm, Rs
• MOV{S}{cond} Rd, Rm, ROR Rs is a synonym for ROR{S}{cond} Rd, Rm, Rs
See ASR, LSL, LSR, ROR, and RRX on page 86.
The MVN instruction takes the value of operand2, performs a bitwise logical NOT operation
on the value, and places the result into Rd.
Note: The MOVW instruction provides the same function as MOV, but is restricted to use of the
imm16 operand.
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