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ST STM32F4 Series User Manual

ST STM32F4 Series
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The STM32 Cortex-M4 instruction set PM0214
110/262 PM0214 Rev 9
3.6.1 MUL, MLA, and MLS
Multiply, Multiply with Accumulate, and Multiply with Subtract, using 32-bit operands, and
producing a 32-bit result.
Syntax
MUL{S}{cond} {Rd,} Rn, Rm ; Multiply
MLA{cond} Rd, Rn, Rm, Ra ; Multiply with accumulate
MLS{cond} Rd, Rn, Rm, Ra ; Multiply with subtract
Where:
cond’ is an optional condition code (see Conditional execution on page 65).
S’ is an optional suffix. If S is specified, the condition code flags are updated on the
result of the operation (see Conditional execution on page 65).
Rd’ is the destination register. If Rd is omitted, the destination register is Rn.
Rn’, ‘Rm’ are registers holding the values to be multiplied.
Ra’ is a register holding the value to be added to or subtracted from.
Operation
The MUL instruction multiplies the values from Rn and Rm, and places the least significant
32 bits of the result in Rd.
The MLA instruction multiplies the values from Rn and Rm, adds the value from Ra, and
places the least significant 32 bits of the result in Rd.
The MLS instruction multiplies the values from Rn and Rm, subtracts the product from the
value from Ra, and places the least significant 32 bits of the result in Rd.
The results do not depend on whether the operands are signed or unsigned.
Restrictions
In these instructions, do not use either SP or PC.
If you use the S suffix with the MUL instruction:
Rd, Rn, and Rm must all be in the range R0 to R7
Rd must be the same as Rm
You must not use the cond suffix
Condition flags
If S is specified, the MUL instruction:
Updates the N and Z flags according to the result.
Does not affect the C and V flags.
Examples
MUL R10, R2, R5 ; multiply, R10 = R2 x R5
MLA R10, R2, R1, R5 ; multiply with accumulate, R10 = (R2 x R1) + R5
MULS R0, R2, R2 ; multiply with flag update, R0 = R2 x R2
MULLT R2, R3, R2 ; conditionally multiply, R2 = R3 x R2
MLS R4, R5, R6, R7 ; multiply with subtract, R4 = R7 - (R5 x R6)

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ST STM32F4 Series Specifications

General IconGeneral
SeriesSTM32F4
CoreARM Cortex-M4
Clock SpeedUp to 180 MHz
Flash MemoryUp to 2 MB
RAMUp to 384 KB
Operating Voltage1.8 V to 3.6 V
DAC12-bit, up to 2 channels
TimersUp to 17 timers
Communication InterfacesUSB, CAN, SPI, I2C, USART, Ethernet
Operating Temperature-40°C to 85°C
PackageLQFP, WLCSP, BGA

Summary

Introduction to the STM32 Cortex-M4 Programming Manual

Cortex-M4 Processor Features and Benefits

Summarizes key advantages: outstanding performance, enhanced debug, efficient core, low power, and security.

Reference Documents for STM32 Cortex-M4

Lists datasheets and reference manuals available from STMicroelectronics website for further details.

About this document

Typographical Conventions Used

Explains conventions for highlighting important notes, cross-references, and code elements.

Abbreviations for Registers

Lists common abbreviations used in register descriptions, such as (rw), (r), and (w).

STM32 Cortex-M4 Processor and Core Peripherals Overview

Introduces the Cortex-M4 processor, its architecture, and integrated core peripherals.

The Cortex-M4 Processor

Cortex-M4 Programmers Model

Describes processor modes, privilege levels, execution states, and stack usage.

Cortex-M4 Memory Model

Explains the memory map, access behavior, and bit-banding features.

Cortex-M4 Exception Model

Covers exception states, types, handlers, priorities, and grouping mechanisms.

The STM32 Cortex-M4 Instruction Set

Instruction Set Summary and Syntax

Lists supported instructions, syntax conventions, and flexible operand usage.

Memory Access Instructions

Details instructions for loading and storing data from memory.

General Data Processing Instructions

Covers arithmetic, logical, shift, and data manipulation instructions.

Multiply and Divide Instructions

Explains signed/unsigned multiply, accumulate, divide, and saturation instructions.

Saturating Instructions

Describes instructions performing saturation arithmetic on signed/unsigned values.

Core Peripherals

Nested Vectored Interrupt Controller (NVIC)

Details the NVIC's interrupt handling, priority levels, and registers.

System Control Block (SCB) Registers

Explains SCB registers for system control, configuration, and exception reporting.

SysTick Timer (STK) Functionality

Describes the SysTick timer for system timing and RTOS tick generation.

Document Revision History

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