The STM32 Cortex-M4 instruction set PM0214
76/262 PM0214 Rev 9
Condition flags
These instructions do not change the flags.
Examples
LDR R0, LookUpTable; load R0 with a word of data from an address
; labelled as LookUpTable
LDRSB R7, localdata; load a byte value from an address labelled
; as localdata, sign extend it to a word
; value, and put it in R7
3.4.6 LDM and STM
Load and Store Multiple registers.
Syntax
op{addr_mode}{cond} Rn{!}, reglist
Where:
• ‘op’ is either LDM (load multiple register) or STM (store multiple register).
• ‘addr_mode’ is any of the following:
IA: Increment address after each access (this is the default).
DB: Decrement address before each access.
• ‘cond’ is an optional condition code, see Conditional execution on page 65.
• ‘Rn’ is the register on which the memory addresses are based.
• ‘!’ is an optional writeback suffix. If ! is present, the final address that is loaded from or
stored to is written back into Rn.
• ‘reglist’ is a list of one or more registers to be loaded or stored, enclosed in braces. It
can contain register ranges. It must be comma-separated if it contains more than one
register or register range, see Examples on page 77.
LDM and LDMFD are synonyms for LDMIA. LDMFD refers to its use for popping data from
full descending stacks.
LDMEA is a synonym for LDMDB, and refers to its use for popping data from empty
ascending stacks.
STM and STMEA are synonyms for STMIA. STMEA refers to its use for pushing data onto
empty ascending stacks.
STMFD is s synonym for STMDB, and refers to its use for pushing data onto full descending
stacks
Operation
LDM instructions load the registers in reglist with word values from memory addresses
based on Rn.
STM instructions store the word values in the registers in reglist to memory addresses
based on Rn.
For LDM, LDMIA, LDMFD, STM, STMIA, and STMEA the memory addresses used for the
accesses are at 4-byte intervals ranging from Rn to Rn + 4 * (n-1), where n is the number of
registers in reglist. The accesses happen in order of increasing register numbers, with the
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