PM0214 Rev 9 93/262
PM0214 The STM32 Cortex-M4 instruction set
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3.5.9 SADD16 and SADD8
Signed Add 16 and Signed Add 8
Syntax
op{cond}{Rd,} Rn, Rm
Where:
• op is any of the following:
SADD16: Performs two 16-bit signed integer additions.
SADD8: Performs four 8-bit signed integer additions.
• ‘cond’ is an optional condition code (see Conditional execution on page 65).
• ‘Rd’ is the destination register.
• ‘Rn’ is the register holding the operand.
• ‘Rm’ is the second register holding the operand.
Operation
Use these instructions to perform a halfword or byte add in parallel:
The SADD16 instruction:
1. Adds each halfword from the first operand to the corresponding halfword of the second
operand.
2. Writes the result in the corresponding halfwords of the destination register.
The SADD8 instruction:
1. Adds each byte of the first operand to the corresponding byte of the second operand.
2. Writes the result in the corresponding bytes of the destination register.
Restrictions
Do not use SP and do not use PC.
Condition flags
These instructions do not change the flags.
Examples
SADD16 R1, R0 ; Adds the halfwords in R0 to the corresponding halfword
; of R1 and writes to corresponding halfword of R1.
SADD8 R4, R0, R5 ; Adds bytes of R0 to the corresponding byte in R5 and
; writes to the corresponding byte in R4.