Specifications (MSO70000/C Series, DSA/DPO70000B/C Series, and DPO7000 Series)
Table 1-4: Serial Trigger specifications, all MSO70000/C and DSA/DPO70000B/C Series models (optional on
DPO7000 model
s) (cont.)
Characteri
stic
Descriptio
n
Clock recov
ery frequency
range
≥ 4 GHz models, typical 1.5 MBaud to 3.125 GBaud. Above 1250 MHz, the clock is only available internally as a trigger source.
Below 1250 MHz, the clock is also available at the recovered clock output along with regenerated data.
< 4 GHz models 1.5 MBaud to 1.25 GBaud.
Clock recovery jitter, typical
≥ 4 GHz models < 0.25% bit period + 2 ps rms for PRBS data patterns with 50% transition density.
< 0.25% bit period + 1.5 ps rms for repeating 0011 data patterns.
Jitter (ps rms)
Bit rate Pattern
PRBS
0011
3.125 GBd
00110011 2.8 ps 2.3 ps
2.74 GBd
00110011 2.9 ps 2.4 ps
2.35 GBd
00110011 3.1 ps 2.6 ps
2.34 GBd
00110011 3.1 ps 2.6 ps
1.95 GBd
00110011 3.3 ps 2.8 ps
1.57 GBd
00110011 3.6 ps 3.1 ps
100 MBd 00110011 27 ps 27 ps
10 MBd 00110011 252 ps 252 ps
< 4 GHz models 20 psRMS + 1.25% Unit interval RMS for PRBS data patterns.
20 psRMS + 1.25% Unit interval RMS for repeating 0011 data patterns. (Transition density of 50%).
Jitter increases by 1.4 every time the transition density is reduced by half.
28 psRMS + 1.25% Unit interval RMS for 25% transition density.
30 psRMS + 1.25% Unit interval RMS for 12.5% transition density.
Clock recovery
tracking/acquisition range,
typical
≥ 4 GHz models ± 2% of requested baud
< 4 GHz models ± 5% of requested baud
Minimum signal amplitude
needed for clock recovery,
typical
≥ 4 GHz models 1 division peak-peak up to 1.25 GBd
1.5 divisions peak-peak above 1.25 GBd
Tri-level signals need 50% more pk-pk amplitude
< 4 GHz m odels 1 division peak-peak up to 1.25 G Bd
50% more peak-to-peak amplitude is required for tri-level signals.
Serial interface triggering
standards supported,
< 4 GHz models
I
2
C, CAN, SPI, USB1.1, RS232
MSO70000/C, DSA70000B/C, DPO7000B/C, DPO7000, MSO5000, DPO5000 Series 1–49