3.1 Signal Connections for In-System Programming and Debugging, MSP-FET430PIF,
Signal Connections for In-System Programming and Debugging, MSP-FET430PIF, MSP-FET430UIF, GANG430, PRGS430
MSP-FET430UIF, GANG430, PRGS430
With the proper connections, the C-SPY debugger and an FET hardware JTAG interface, such as the
MSP-FET430PIF and MSP-FET430UIF, can be used to program and debug code on a target board. In
addition, the connections can also support the GANG430 or PRGS430 production programmers, which
provide an easy way to program prototype boards, if desired.
Figure 3-1 shows the connections between the 14-pin FET Interface module connector and the target
device required to support in-system programming and debugging using C-SPY for 4-wire JTAG
communication. Figure 3-2 shows the connections for 2-wire Spy-Bi-Wire communication. While 4-wire
JTAG mode is generally supported on all MSP430 devices, 2-wire Spy-Bi-Wire mode is available on
selected devices only. See Table 2-1 for information on which interfacing method can be used on which
device.
The connections for the FET Interface module and the GANG430 or PRGS430 are identical. Both the FET
interface module and GANG430 can supply V
CC
to your target board (via pin 2). In addition, the FET
interface module and GANG430 have a V
CC
-sense feature that, if used, requires an alternate connection
(pin 4 instead of pin 2). The V
CC
-sense feature senses the local V
CC
(present on the target board, i.e., a
battery or other local power supply) and adjusts the output signals accordingly. If the target board is to be
powered by a local V
CC
, the connection to pin 4 on the JTAG should be made and not the connection to
pin 2. This utilizes the V
CC
-sense feature and prevents any contention that might occur if the local
on-board V
CC
were connected to the V
CC
supplied from the FET interface module or the GANG430. If the
V
CC
-sense feature is not necessary (i.e., the target board is to be powered from the FET Interface module
or the GANG430) the V
CC
connection is made to pin 2 on the JTAG header and no connection is made to
pin 4. Figure 3-1 and Figure 3-2 show a jumper block that supports both scenarios of supplying V
CC
to the
target board. If this flexibility is not required, the desired V
CC
connections may be hard-wired, eliminating
the jumper block. Pins 2 and 4 must not be connected simultaneously.
Note that in 4-wire JTAG communication mode (see Figure 3-1 ), the connection of the target RST signal
to the JTAG connector is optional, and it is not required when using 4-wire JTAG communication mode
capable only devices. However, when using 2-wire Spy-Bi-Wire communication mode capable devices in
4-wire JTAG mode, the RST connection must be made. The MSP430 development tools and device
programmers perform a target reset by issuing a JTAG command to gain control over the device.
However, if this is unsuccessful, the RST signal of the JTAG connector can be used by the development
tool or device programmer as an additional way to assert a device reset.
24 Design Considerations for In-Circuit Programming SLAU138F – June 2004 – Revised March 2007
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