Toshiba E-STUDIO520 - Setting the NetWare Settings

e-STUDIO520/600/720/850 CONTROL PANEL March 2005 © TOSHIBA TEC
5 - 14
2) Block diagram
Fig.5-6
(240, 1) (240, 2) ·········································· (240, 640)
(1, 1) (1, 2) ······················································ (1, 640)
(2, 1) (2, 2) ······················································ (2, 640)
IC1
Bias ratio generation circuit
Temperature compensated circuit
160 Out
120 Out
120 Out
E101E102
D101
D102
VDD
HV
GND
VEE
VLCD
FRM
DF
DISP
CP
D3-D0
VSS
D101
D102
E101E102
Seg4Seg1
Com1
Com2
VDD, V0, V2, V3, VSS
VDD,
V0,
V1,
V4,
VSS
160 Out
V0
V1
V2
V3
V4
LCD panel
640 x 240 Dots
CCFT
NC
NC
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Rth