USER'S GUIDE ____________________________________________________________________
28 __________________________________________________________________ M210543EN-F
Memory Tests
After resetting, PWD22/52 tests and clears its SRAM data memory. It
indicates an error by the Signal/Offset LED blinking. After 50 blinks
PWD22/52 tries to start the program anyway. Usually this causes a
watchdog reset, if the SRAM is really faulty.
The data SRAM test is also done continuously in the background in
normal operation. If a SRAM error is detected, the watchdog resets the
system.
The checksum of the parameter memory (EEPROM) is calculated and
checked for test. An error in the checksum may be fatal (visibility is
indicated using /////). The cause is displayed in the status message.
The EEPROM checksum is calculated and checked during every update
of saved parameters and after restart.
Signal Monitoring
PWD22/52 measures the optical signal, receiver backscatter, and offset
as frequencies in about eight millisecond samples. As the measuring
times are 10 s, 1 s, and 4 s correspondingly, they must have different
numbers of samples in a batch. PWD22/52 checks that the frequencies
are not zero and signal sample count is bigger than the offset sample
count.
Errors in signal or offset are fatal, and data is set to /////.
Offset drift is monitored separately. The reference offset frequency is
given in the configuration session. If the drift is more than 10 Hz, the
software generates a warning.
The user can follow the progress of the measurement sequence as the
Signal/Offset LED sequence of 10 seconds on, and 5 seconds off.
Hardware Monitoring
An eight-channel analog-to-digital converter is used to measure hardware
signals and voltages. The STA command displays the internal monitoring
values (See section STA on page 75).
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