Violin Memory 6000 Series - Connecting the ACMs for vMOS-6

Chapter 1: Memory Array Hardware Installation
26
Violin 6000 Series Memory Array Installation Guide 535-0045-00 Rev 02
Connecting the ACMs for vMOS-6
Note: This cable connection is only required for vMOS-6.
vMOS-6 requires that the ACMs be externally connected to each other to interconnect the internal
Memory Gateways. This cable connection enables a Non-Transparent Bridge (NTB), which allows
for high-bandwidth, low latency inter-cluster coordination between the two Memory Gateways for
effective management of thin provisioned LUNs and snapshots.
There are two Array Controllers Modules (ACMs) in the system. Each Array Controller provides two
PCIe x8 Gen2 ports. The ACMs communicate with each other using a PCI Express (PCIe)
connection. This section describes the steps required to connect the ACMs to each other.
To connect the PCIe cable:
1. Using the supplied PCIe cable, align the connectors of both ends of the PCIe cable with the
bottom ports on the ACMs: ACM A port 2 and ACM B port 2, as shown in Figure 1.18.
WARNING! You must use the bottom PCIe ports on the ACMs for this connection. The top PCIe
ports must remain unused in this configuration.
2. Securely plug the PCIe cables into the PCIe connectors of the bottom PCIe ports.
There is no configuration required to enable this ACM-to-ACM connection. You can, however, verify
that NTB is configured and to view its status by using the “show ntb” commands. See Verifying
NTB Link (vMOS-6 Only) on page 45 for more information.
Note: If you are using the cable management arm, route this cable in the arm along with the other
cables. Ensure that the bend radius of the PCIe cable is greater than 1.9".
Figure 1.18 Connecting the PCIe Cables to the ACMs
PCIe Gen2 Ports
B
2
A