Xilinx MultiLINX Series User Manual

Hardware User Guide
4-4 Xilinx Development System
Figure 4-1 XC9536 Device Schematic
The following figure shows the pin layout and components of the ISP
Demonstration Board.
C1
0.1uF
34
35
36
37
38
40
42
43
44
39
41
+5V
J2
32 31 30 29 27 25 2428 2633 23
C2
0.1uF
D1
D2
D3
D4
D5
D6
D7
D8
R1
R2
R3
R4
R5
R6
R7
R8
470
470
470
470
470
470
470
470
I/O
I/O
I/O
I/O
I/O
GND
I/O
VCC
I/O
I/O
I/O
GTS2
VCC
GTS1
I/O
I/O
I/O
I/O
I/O
I/O
GCK1
GCK2
GSR
I/O I/O I/O I/O I/O I/O
VCC
GND
TDO
I/O
GCK3
I/O I/O I/O
GND
I/O I/O I/O
TDI
TMS
TCK
VCC
GND
TCK
TDO
TDI
TMS
C4
22uF
+
U2
LM2940
+9V
J3
9V BATTERY
60mA
2 3
4 5 7 9
10
6
8
1
11
C3
.047uF
U1
XC9536
ON
SW1
OFF
GND
TRIG
VCC
OUT
CONT
RESET
DISCH
THRES
R9
1M
TLC555
U3
1
2
3
4
8
7
6
5
X8087
22
21
20
19
18
16
14
13
12
17
15

Xilinx MultiLINX Series Specifications

General

Brand	Xilinx
Model	MultiLINX Series
Category	Cables and connectors
Language	English