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Xilinx MultiLINX Series User Manual

Xilinx MultiLINX Series
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Cable Hardware
Hardware User Guide 1-9
The transmission speed of the this cable is determined solely by the
speed at which the host PC can transmit data through its parallel port
interface.
Using the Parallel Cable III requires a PC equipped with an AT
compatible parallel port interface and a DB25 standard printer
connector.
Flying Leads
This cable is shipped with two sets of flying leads, one for FPGAs and
one for CPLDs. The CPLD leads are labelled “JTAG” and the FPGA
leads are labelled “FPGA”.
Each flying lead has a 9-pin (6 signals, 3 keys) header connector on
one end. This connector fits onto one of the two cable headers. These
header connectors are keyed to assure proper orientation to the cable
assembly.
On the other end of each flying lead are six individual wires with
female connectors. The female connectors fit onto standard 0.025 inch
square male pins.
As an example, the following figure shows the Parallel Cable III and
its FPGA flying lead wires.

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Xilinx MultiLINX Series Specifications

General IconGeneral
BrandXilinx
ModelMultiLINX Series
CategoryCables and connectors
LanguageEnglish