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Xilinx MultiLINX Series User Manual

Xilinx MultiLINX Series
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Hardware User Guide
iv Xilinx Development System
See the Development System Reference Guide for more informa-
tion.
Emphasis in text
If a wire is drawn so that it overlaps the pin of a symbol, the
two nets are not connected.
Square brackets “[ ]” indicate an optional entry or parameter.
However, in bus specifications, such as bus [7:0], they are
required.
edif2ngd [option_name] design_name
Braces “{ }” enclose a list of items from which you must choose
one or more.
lowpwr ={on|off}
A vertical bar “|” separates items in a list of choices.
lowpwr ={on|off}
A vertical ellipsis indicates repetitive material that has been
omitted.
IOB #1: Name = QOUT’
IOB #2: Name = CLKIN’
.
.
.
A horizontal ellipsis “….” indicates that an item can be repeated
one or more times.
allow block block_name loc1 loc2locn;
Online Document
The following conventions are used for online documents.
Red-underlined text indicates an interbook link, which is a cross-
reference to another book. Click the red-underlined text to open
the specified cross-reference.

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Xilinx MultiLINX Series Specifications

General IconGeneral
BrandXilinx
ModelMultiLINX Series
CategoryCables and connectors
LanguageEnglish