Hardware User Guide
Glossary-2 Xilinx Development System
FPGA Lead Wires
FPGA lead wires connnect to the Parallel Cable III.
GUI Based Program
A graphical program used for accessing the implementation
tools.
In System Programming (ISP)
A programmable logic device that can be programmed after it
has been connected to the system pc-board.
JTAG Mode
JTAG Mode is a MultiLINX configuration mode supported by
the following MultiLINX devices: Virtex, Spartan, XC9500,
XC5200, and XC4000.
MultiLINX Cable
The MultiLINX cable is a device for configuring and verifying
Xilinx FPGAs and CPLDs.
MultiLINX Flying Wires
The MultiLINX flying wires consist of four sets that are
included with the MultiLINX Cable.
Parallel Cable III
Parallel Cable III is a cable assembly which contains a buffer to
protect your PCs parallel port and a set of headers to connect to
your target system.
Readback
Readback is the process of reading the logic downloaded to an
FPGA device.
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