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Xilinx MultiLINX Series User Manual
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Hardware
User
Guide
Glossary-4
Xilinx
Development
System
107
Table of Contents
About this Manual
5
Manual Contents
5
Additional Resources
6
Conventions
7
Online Document
8
Table of Contents
11
Chapter 1 Cable Hardware
15
Cable Overview
15
Selecting a Cable
15
Multilinx Cable
15
Parallel Cable
16
Xchecker Cable
16
Software Support
16
Cable Limitations
17
Xchecker Hardware Drawbacks
17
Multilinx Hardware Advantages
17
Previous Cable Versions
18
Cable Baud Rates
19
Multilinx Cable and Flying Leads
19
External Power for the Multilinx Cable
21
Parallel Cable III
22
Flying Leads
23
Configuring Cplds with the Parallel Cable III
25
Configuring Fpgas with the Parallel Cable III
27
Xchecker Cable
31
Xchecker Baud Rates
32
Configuring Cplds with the Xchecker Cable
32
Configuring Fpgas with the Xchecker Cable
33
Pin Connection Considerations
34
Cable Connection Procedure
35
Setting up the Cable
36
Download Cable Schematic
36
Chapter 2 Mutlilinx ™ Cable
39
Additional Multilinx Documentation
39
Multilinx Platform Support
40
Multilinx Flying Wires
40
Multilinx Baud Rates
46
Multilinx Power Requirements
46
External Power for the Multilinx Cable
46
Device Configuration Modes
48
Downloading Configuration Data
48
Slave Serial Mode (XC3000)
48
Downloading Configuration Data or Verification of Data
50
Selectmap Mode (Virtex)
50
Downloading Configuration Data
51
JTAG Mode (XC9000, Virtex, Spartan, XC5200, XC4000)
51
Downloading/Verification of Configuration Data
52
Slave Serial Mode (XC3000)
52
Slave Serial Mode (Spartan, XC5200, XC4000)
53
Selectmap Mode (Virtex)
54
Selectmap Mode (Virtex with Asynchronous Probing)
55
JTAG Mode (XC9000, Virtex, Spartan, XC5200, XC4000)
56
Verification of Configuration Data Only
57
Verification of Configuration Data Only (Spartan, XC5200, XC4000)
57
Synchronous Probing
59
Slave Serial Mode (XC3000)
59
Chapter 3 FPGA Design Demonstration Board
63
Demonstration Board Overview
63
Device Support
63
Download Cable Support
64
Software Support
64
Board Features
64
General Components
66
Power Connector (J9)
67
Unregulated Power Input (J12)
68
Regulator Option (U3)
68
RESET Pushbutton (SW4)
69
SPARE Pushbutton (SW5)
69
PROG Pushbutton (SW6)
69
Eight General-Purpose Input Switches (SW3)
69
Seven-Segment Displays (U6, U7, U8)
71
LED Indicators (D1-D8, D9-D16)
72
I/O Line Connections
73
Optional Crystal Oscillator (Y1)
73
Prototype Area
73
XC4003E Components
74
XC4003E FPGA and Socket (U5)
75
XC4003E Probe Points
76
XC4003E Configuration Switches (SW2)
76
PWR-Power (SW2-1)
76
MPE-Multiple Program Enable (SW2-2)
76
SPE-Single Program Enable (SW2-3)
76
M0, M1, M2-Mode Pins (SW2-4,5,6)
77
RST-Reset (SW2-7)
77
INIT-Initialize (SW2-8)
77
Xchecker/Parallel Cable III Connector J2
77
Jumper J7 and Tiepoints J10 (1-3)
79
Serial PROM Socket (U2)
79
XC3020A Components
80
XC3020A FPGA and Socket (U4)
81
XC3020A Probe Points
81
XC3020A Configuration Switches (SW1)
81
INP-Input Switch (SW1-1)
81
MPE-Multiple Program Enable (SW1-2)
82
SPE-Single Program Enable (SW1-3)
82
M0, M1, M2-Mode Pins (SW1-4,5,6)
82
MCLK-Master Clock (SW1-7)
83
DOUT-Data out (SW1-8)
83
Xchecker/Parallel Cable III Connector J1
83
Serial PROM Socket (U1)
85
Relaxation Oscillator Components (R1 C5, R2 C6)
85
Mode Switch Settings
87
Demonstration Board Operation
92
Design Downloading Checklist
93
Loading with a Configuration PROM
94
Starting Hardware Debugger
95
Tutorials
96
Chapter 4 CPLD Design Demonstration Board
97
Demonstration Board Overview
97
Software and Download Cable Support
97
Printed Circuit Board (PCB)
98
Prototyping Area
98
Power Supply
98
Demonstration Board Schematics
99
Foundation Design Tutorial
101
Example I: Schematic Design Entry
101
Schematic with VHDL Macro Design
102
Example 2: VHDL Design Entry
103
4
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Xilinx MultiLINX Series Specifications
General
Brand
Xilinx
Model
MultiLINX Series
Category
Cables and connectors
Language
English
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General
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