ABB REL650 - Page 20

Application....................................................................................... 418
Setting guidelines............................................................................ 419
Configurable logic blocks......................................................................419
Identification.................................................................................... 419
Application....................................................................................... 420
Configuration.............................................................................. 421
Fixed signals FXDSIGN........................................................................422
Identification.................................................................................... 422
Application....................................................................................... 422
Boolean 16 to integer conversion B16I.................................................423
Identification.................................................................................... 423
Application....................................................................................... 423
Setting guidelines............................................................................ 424
Boolean 16 to integer conversion with logic node representation
B16IFCVI.............................................................................................. 424
Identification.................................................................................... 424
Application....................................................................................... 424
Setting guidelines............................................................................ 424
Integer to boolean 16 conversion IB16A...............................................424
Identification.................................................................................... 424
Application....................................................................................... 425
Setting guidelines............................................................................ 425
Integer to boolean 16 conversion with logic node representation
IB16FCVB.............................................................................................425
Identification.................................................................................... 425
Application....................................................................................... 425
Settings............................................................................................425
Elapsed time integrator with limit transgression and overflow
supervision TEIGGIO............................................................................426
Identification.................................................................................... 426
Application....................................................................................... 426
Setting guidelines............................................................................ 426
Section 14 Monitoring..........................................................................427
IEC61850 generic communication I/O functions SPGGIO................... 427
Identification.................................................................................... 427
Application....................................................................................... 427
Setting guidelines............................................................................ 427
IEC61850 generic communication I/O functions 16 inputs SP16GGIO427
Identification.................................................................................... 427
Application....................................................................................... 428
Table of contents
14
Application manual