Step no. Changes after step 2 Expected output
4-e** Activate binary input TRIGCOMP for 1 s • The output COMPEXED
should become HIGH for
100 ms and LASTCOMP
output should display the
date and time of
compensation
• URATIOL1 and
USEDURATL1 should
show 0.382
• DIFURATL1 should
become LOW
WARNING signal test
4-f Inject U
TapL1
= 23.04 V in secondary at rated
frequency
• WARNING and WRNL1
signals should become
HIGH after a time delay
given by the setting
tDefWrn
• PUDIFL1 should show 5.03
%
ALARM signal Test
Repeat Sub-step 4–a and Sub-step 4–b
4-g Inject U
TapL1
= 22.31 V in secondary at rated
frequency
• ALARM and ALML1 signals
should become HIGH after
a time delay given by the
setting tDefAlm
• PUDIFL1 should show
8.04%
TRIP Signal Test
Repeat Sub-step 4–a and Sub-step 4–b
4-h Inject U
TapL1
= 21.83 V in secondary at rated
frequency
• BFI_3P and PU_A signals
should become HIGH after
a time delay given by the
setting tDefTrip
• TRIP and TR_A signals
should become HIGH, if
BlockTrip is set to Trip
enabled
• PUDIFL1 should show
10.01%
- Steps 4–f, 4–g and 4–h can also be done phase wise.
* - UBase is considered as 400 kV and VT ratio as 400 kV/110 V
The voltage inputs U
L1
, U
L2
, and U
L3
refer to the bus voltages and U
TapL1
refers to the tap voltage of
phase L1.
** - This step should be done only during Factory Acceptance Test (FAT). At field, the testing should be
done with the stored field values.
To calculate PUDIFL1 in steps 4-f, 4-g and 4-h, use the following equations:
11
1
1
1
L TapL
UDIFL U U
USEDURATL
IECEQUATION19217 V1 EN-US (Equation 111)
Section 11 1MRK 504 165-UUS Rev. J
Testing functionality by secondary injection
222 Transformer protection RET670
Commissioning manual
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