Abov A96G174 - Register Map; Reset Operation Register Description; Table 31. Reset Operation Register Map

16. Reset A96G174/A96S174 User’s manual
166
16.6 Register Map
Table 31. Reset Operation Register Map
Name
Address
Direction
Default
Description
RSTFR
E8H
R/W
80H
Reset Flag Register
LVRCR
D8H
R/W
00H
Low Voltage Reset Control Register
LVICR
86H
R/W
00H
Low Voltage Indicator Control Register
16.7 Reset Operation Register Description
RSTFR (Reset Flag Register): E8H
7
6
5
4
3
2
1
0
PORF
EXTRF
WDTRF
OCDRF
LVRF
–
–
–
R/W
R/W
R/W
R/W
R/W
–
–
–
Initial value: 80H
PORF
Power-On Reset flag bit. The bit is reset by writing ‘0’ to this bit.
0
No detection
1
Detection
EXTRF
External Reset (RESETB) flag bit. The bit is reset by writing ‘0’ to this
bit or by Power-On Reset.
0
No detection
1
Detection
WDTRF
Watch Dog Reset flag bit. The bit is reset by writing ‘0’ to this bit or by
Power-On Reset.
0
No detection
1
Detection
OCDRF
On-chip debugger reset flag bit. The bit reset by writing ‘0’ to this bit
or by Power-On Reset
0
No detection
1
Detection
LVRF
Low Voltage Reset flag bit. The bit is reset by writing ‘0’ to this bit or
by Power-On Reset.
0
No detection
1
Detection
NOTES:
1. When the Power-On Reset occurs, the PORF bit is only set to “1”, the other flag (WDTRF) bits are all
cleared to “0”.
2. When the Power-On Reset occurs, the EXTRF bit is unknown, at that time, the EXTRF bit can be set
to “1” when External Reset (RESETB) occurs.
3. When the Power-On Reset occurs, the LVRF bit is unknown, at that time, the LVRF bit can be set to
“1” when LVR Reset occurs.
4. When a reset except the POR occurs, the corresponding flag bit is only set to “1”, the other flag bits
are kept in the previous values.