Abov A96G174 - Register Description

11. Timer 0/1/2 A96G174/A96S174 User’s manual
96
11.2.7 Register description
T1ADRH (Timer 1 A data High Register): BDH
7
6
5
4
3
2
1
0
T1ADRH7
T1ADRH6
T1ADRH5
T1ADRH4
T1ADRH3
T1ADRH2
T1ADRH1
T1ADRH0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: FFH
T1ADRH[7:0]
T1 A Data High Byte
T1ADRL (Timer 1 A Data Low Register): BCH
7
6
5
4
3
2
1
0
T1ADRL7
T1ADRL6
T1ADRL5
T1ADRL4
T1ADRL3
T1ADRL2
T1ADRL1
T1ADRL0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: FFH
T1ADRL[7:0]
T1 A Data Low Byte
NOTE: Do not write “0000H” in the T1ADRH/T1ADRL register when PPG mode
T1BDRH (Timer 1 B Data High Register): BFH
7
6
5
4
3
2
1
0
T1BDRH7
T1BDRH6
T1BDRH5
T1BDRH4
T1BDRH3
T1BDRH2
T1BDRH1
T1BDRH0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: FFH
T1BDRH[7:0]
T1 B Data High Byte
T1BDRL (Timer 1 B Data Low Register): BEH
7
6
5
4
3
2
1
0
T1BDRL7
T1BDRL6
T1BDRL5
T1BDRL4
T1BDRL3
T1BDRL2
T1BDRL1
T1BDRL0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: FFH
T1BDRL[7:0]
T1 B Data Low Byte
T1CDRH (Timer 1 C Data High Register): DAH
7
6
5
4
3
2
1
0
T1CDRH7
T1CDRH6
T1CDRH5
T1CDRH4
T1CDRH3
T1CDRH2
T1CDRH1
T1CDRH0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: FFH
T1CDRH[7:0]
T1 C Data High Byte
T1CDRL (Timer 1 C Data Low Register): D9H
7
6
5
4
3
2
1
0
T1CDRL7
T1CDRL6
T1CDRL5
T1CDRL4
T1CDRL3
T1CDRL2
T1CDRL1
T1CDRL0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: FFH
T1CDRL[7:0]
T1 C Data Low Byte