296 Rockwell Automation Publication 1756-RM006K-EN-P - November 2018
Execution
Function Block
Condition Function Block Action
Prescan EnableIn and EnableOut bits are cleared to false.
Tag.EnableIn is false EnableIn and EnableOut bits are cleared to false.
Tag.EnableIn is true EnableIn and EnableOut bit bits are set to true
The instruction executes.
Instruction first run N/A
Instruction first scan Clear previous scan data.
Postscan EnableIn and EnableOut bits are cleared to false
Structured Text
Condition/State Action Taken
Prescan See Prescan in the Function Block table.
Normal Execution See Tag.EnableIn is true in the Function Block table.
Postscan See Postscan in the Function Block table.
Example
In most coordinated drive applications, a master reference commands line speed
for an entire group of drives. As various references are selected, the drives cannot
be presented with "step" changes in speed reference because differences in load
inertia, motor torque, and tuning would not allow the individual drive sections to
react in a coordinated manner. The SCRV instruction is designed to ramp and
shape the reference signal to the drive sections so that acceleration, deceleration,
and jerk, (derivative of acceleration,) are controlled. This instruction provides a
mechanism to allow the reference to the drives to reach the designated reference
setpoint in a manner that eliminates excessive forces and excessive impact on
connected machinery and equipment.
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