Allen-Bradley MicroLogix 1100 Instruction Set Reference Manual

Publication 1763-RM001C-EN-P - October 2009
106 Using the High-Speed Counter and Programmable Limit Switch
Count Direction (DIR)
The DIR (Count Direction) status flag is controlled by the HSC sub-system.
When the HSC accumulator counts up, the direction flag is set (1).
Whenever the HSC accumulator counts down, the direction flag is cleared
(0).
If the accumulated value stops, the direction bit retains its value. The only
time the direction flag changes is when the accumulated count reverses.
This bit is updated continuously by the HSC sub-system whenever the
controller is in a run mode.
Mode Done (MD)
The MD (Mode Done) status flag is set (1) by the HSC sub-system when
the HSC is configured for Mode 0 or Mode 1 behavior, and the
accumulator counts up to the High Preset.
Count Down (CD)
The CD (Count Down) bit is used with the bidirectional counters (modes
2 to 7). If the CE bit is set, the CD bit is set (1). If the CE bit is clear, the
CD bit is cleared (0).
Description Address Data Format
HSC Modes
(1)
(1) For Mode descriptions, see HSC Mode (MOD) on page 107.
Type User Program Access
DIR - Count
Direction
HSC:0/DIR bit 0 to 7 status read only
Description Address Data Format
HSC Modes
(1)
(1) For Mode descriptions, see HSC Mode (MOD) on page 107.
Type User Program Access
MD - Mode
Done
HSC:0/MD bit 0 or 1 status read/write
Description Address Data Format
HSC Modes
(1)
(1) For Mode descriptions, see HSC Mode (MOD) on page 107.
Type User Program Access
CD - Count Down HSC:0/CD bit 2 to 7 status read only
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Allen-Bradley MicroLogix 1100 Specifications

General

Brand	Allen-Bradley
Model	MicroLogix 1100
Category	Controller
Language	English