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Astrodesign VG-876 - 4.2.8 Displaying setting information as patterns

Astrodesign VG-876
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Chapter 4 Digital Output Settings (DIGITAL OUTPUT)
73
4.2.8 Displaying setting information as patterns
The setting information (link rate, number of lanes, link training result, and DPCD) of DisplayPort can be displayed as patterns.
* For details on the display procedure, refer to the Pattern settings section in this manual.
Setting display information (GUI Page 1)
This displays the settings for the DisplayPort interface (link rate, number of lanes, and Main Stream Attribute) and the link training
result.
The following shows the details of the displayed information.
DisplayPort
Information
DPx
Displays the port number (DP1 to DP8).
Function
Displays the execution function (Audio/MST) of the
VM-1876A-M1. (Only when VM-1876A-M1 implemented)
Link Rate
Displays the link rate.
Lane Count
Displays the number of lanes.
Main Stream Attribute
M (at a certain time)
Displays the Mvid value calculated by the device depending on Nvid and dot clock.
* The Mvid value is variable but the value when this display setting was configured is
displayed.
* This is not supported (not displayed) with the VM-1876A-M1.
N
Displays the output Nvid
value.
* This is not supported
(not displayed) with the
VM-1876A-M1.
Total, Active Start, Active
Sync, Pol
Displays the output MSA timing parameters.
Synchronous Clock
Displays the output MSA MISC0 bit 0 value.
* The VG-876 and VG-879 are fixed to Asynchronous.
Component Format
Displays the output MSA MISC0 bit7:1 value.
Dynamic Range
YCbCr Colorimetry
Bit Depth per Color
Result of link training of
each lane
Clock Recovery
Displays the values below DPCD
Link Status Field.
00202h Bit0(LANE0_CR_DONE)
00202h Bit4(LANE1_CR_DONE)
00203h Bit0(LANE2_CR_DONE)
00203h Bit4(LANE3_CR_DONE)
Channel EQ
Displays the values below DPCD
Link Status Field.
00202h Bit1(LANE0_CHANNEL_EQ_DONE)
00202h Bit5 (LANE1_CHANNEL_EQ_DONE)
00203h Bit1 (LANE2_CHANNEL_EQ_DONE)
00203h Bit5 (LANE3_CHANNEL_EQ_DONE)
Voltage swing and
pre-emphasis of each
lane
Voltage Swing
Displays the values below DPCD
Link Configuration Field.
00103h(TRAINING_LANE0_SET)
Bit1:0(VOLTAGE_SWING_SET)
00104h(TRAINING_LANE1_SET)
Bit1:0(VOLTAGE_SWING_SET)
00105h(TRAINING_LANE2_SET)
Bit1:0(VOLTAGE_SWING_SET)
00106h(TRAINING_LANE3_SET)
Bit1:0(VOLTAGE_SWING_SET)
Pre-emphasis
Displays the values below DPCD
Link Configuration Field.
00103h(TRAINING_LANE0_SET)
Bit4:3(PRE-EMPHASIS_SET)
00104h(TRAINING_LANE1_SET)
Bit4:3(PRE-EMPHASIS_SET)
00105h(TRAINING_LANE2_SET)
Bit4:3(PRE-EMPHASIS_SET)
00106h(TRAINING_LANE3_SET)
Bit4:3(PRE-EMPHASIS_SET)

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