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102

ATtiny26(L)

1477G–AVR–03/05

Note: 1. For offset measurements only. See “Offset Compensation Schemes” on page 105.

Table 46. Input Channel and Gain Selections

MUX4..0

Single Ended

Input

Positive Differential

Input

Negative Differential

Input Gain

00000 ADC0

N/A

00001 ADC1

00010 ADC2

00011 ADC3

00100 ADC4

00101 ADC5

00110 ADC6

00111 ADC7

01000 ADC8

01001 ADC9

01010 ADC10

01011

N/A

ADC0 ADC1 20x

01100 ADC0 ADC1 1x

01101

(1)

ADC1 ADC1 20x

01110 ADC2 ADC1 20x

01111 ADC2 ADC1 1x

10000

N/A

ADC2 ADC3 1x

10001

(1)

ADC3 ADC3 20x

10010 ADC4 ADC3 20x

10011 ADC4 ADC3 1x

10100

N/A

ADC4 ADC5 20x

10101 ADC4 ADC5 1x

10110

(1)

ADC5 ADC5 20x

10111 ADC6 ADC5 20x

11000 ADC6 ADC5 1x

11001

N/A

ADC8 ADC9 20x

11010 ADC8 ADC9 1x

11011

(1)

ADC9 ADC9 20x

11100 ADC10 ADC9 20x

11101 ADC10 ADC9 1x

11110 1.18V (V

)

N/A

11111 0V (GND)

Table of Contents Features1
Pin Configuration2
Description3
- Block Diagram4
- Pin Descriptions5
About Code Examples5
AVR CPU Core6
- Architectural Overview6
- General Purpose Register File7
- ALU - Arithmetic Logic Unit8
- Status Register - SREG9
- Stack Pointer - SP10
- Program and Data Addressing Modes10
Memories15
- In-System Programmable Flash Program Memory16
- SRAM Data Memory16
- EEPROM Data Memory17
- I/O Memory20
System Clock and Clock Options22
- Clock Systems and Their Distribution22
- Clock Sources24
- Default Clock Source25
- Crystal Oscillator25
- Low-Frequency Crystal Oscillator26
- External RC Oscillator27
- Calibrated Internal RC Oscillator28
- External Clock29
- High Frequency PLL Clock - PLLCLK30
System Control and Reset31
- Power-On Reset32
- External Reset33
- Brown-Out Detection34
- Watchdog Reset34
- MCU Status Register - MCUSR35
Power Management and Sleep Modes36
- MCU Control Register - MCUCR36
- Idle Mode37
- ADC Noise Reduction Mode37
- Power-Down Mode37
- Standby Mode38
- Minimizing Power Consumption39
I/O Ports41
- Introduction41
- Ports as General Digital I/O42
- Alternate Port Functions46
- Register Description for I/O Ports56
Interrupts57
- Interrupt Vectors57
- Interrupt Handling58
External Interrupt62
- Pin Change Interrupt62
Timer/Counters64
- Timer/Counter0 Prescaler64
- Timer/Counter1 Prescaler65
- 8-Bit Timer/Counter065
- 8-Bit Timer/Counter167
Watchdog Timer78
Universal Serial Interface - USI80
- Overview80
- Register Descriptions81
- Functional Descriptions85
- Alternative USI Usage90
Analog Comparator91
Analog to Digital Converter94
- Features94
- Operation95
- Prescaling and Conversion Timing96
- Changing Channel or Reference Selection98
- ADC Noise Canceler Function99
- ADC Conversion Result99
- Scanning Multiple Channels105
- ADC Noise Canceling Techniques105
- Offset Compensation Schemes105
Memory Programming107
- Program and Data Memory Lock Bits107
- Fuse Bits108
- Signature Bytes109
- Calibration Byte109
- Page Size109
- Parallel Programming Parameters, Pin Mapping, and Commands109
- Parallel Programming112
- Serial Downloading121
- Serial Programming Pin Mapping121
Electrical Characteristics126
- Absolute Maximum Ratings126
- DC Characteristics126
- External Clock Drive Waveforms128
- External Clock Drive128
- ADC Characteristics129
Attiny26 Typical Characteristics131
Register Summary168
Instruction Set Summary169
Ordering Information171
Packaging Information172
- 20P3172
- 173173
- 32M1-A174
Errata175
- Attiny26, All Revisions175
Datasheet Revision History176
- Changes from Rev. 1477F-12/04 to Rev. 1477G-03/05176
- Changes from Rev. 1477E-10/03 to Rev. 1477F-12/04176
- Changes from Rev. 1477D-05/03 to Rev. 1477E-10/03176
- Changes from Rev. 1477C-09/02 to Rev. 1477D-05/03176
- Changes from Rev. 1477B-04/02 to Rev. 1477C-09/02177
- Changes from Rev. 1477A-03/02 to Rev. 1477B-04/02177

Brand	Atmel
Model	ATtiny26
Category	Microcontrollers
Language	English

Atmel ATtiny26 User Manual

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