20
ATtiny26(L)
1477G–AVR–03/05
I/O Memory The I/O space definition of the ATtiny26(L) is shown in Table 2
Table 2. ATtiny26(L) I/O Space
(1)
Address Hex Name Function
$3F ($5F) SREG Status Register
$3D ($5D) SP Stack Pointer
$3B ($5B) GIMSK General Interrupt Mask Register
$3A ($5A) GIFR General Interrupt Flag Register
$39 ($59) TIMSK Timer/Counter Interrupt Mask Register
$38 ($58) TIFR Timer/Counter Interrupt Flag Register
$35 ($55) MCUCR MCU Control Register
$34 ($54) MCUSR MCU Status Register
$33 ($53) TCCR0 Timer/Counter0 Control Register
$32 ($52) TCNT0 Timer/Counter0 (8-bit)
$31 ($51) OSCCAL Oscillator Calibration Register
$30 ($50) TCCR1A Timer/Counter1 Control Register A
$2F ($4F) TCCR1B Timer/Counter1 Control Register B
$2E ($4E) TCNT1 Timer/Counter1 (8-bit)
$2D ($4D) OCR1A Timer/Counter1 Output Compare Register A
$2C ($4C) OCR1B Timer/Counter1 Output Compare Register B
$2B ($4B) OCR1C Timer/Counter1 Output Compare Register C
$29 ($29) PLLCSR PLL Control and Status Register
$21 ($41) WDTCR Watchdog Timer Control Register
$1E ($3E) EEAR EEPROM Address Register
$1D ($3D) EEDR EEPROM Data Register
$1C ($3C) EECR EEPROM Control Register
$1B ($3B) PORTA Data Register, Port A
$1A ($3A) DDRA Data Direction Register, Port A
$19 ($39) PINA Input Pins, Port A
$18 ($38) PORTB Data Register, Port B
$17 ($37) DDRB Data Direction Register, Port B
$16 ($36) PINB Input Pins, Port B
$0F ($2F) USIDR Universal Serial Interface Data Register
$0E ($2E) USISR Universal Serial Interface Status Register
$0D ($2D) USICR Universal Serial Interface Control Register
$08 ($28) ACSR Analog Comparator Control and Status Register
$07 ($27) ADMUX ADC Multiplexer Select Register