108
ATtiny26(L)
1477G–AVR–03/05
Fuse Bits The ATtiny26 has two Fuse bytes. Table 50 and Table 51 describe briefly the functional-
ity of all the fuses and how they are mapped into the fuse bytes. Note that the fuses are
read as logical zero, “0”, if they are programmed.
Notes: 1. The SPIEN Fuse is not accessible in serial programming mode.
2. When programming the RSTDISBL Fuse, Parallel Programming has to be used to
change fuses or perform further programming.
Notes: 1. The default value of SUT1..0 results in maximum start-up time. See Table 12 on page
28 for details.
2. The default setting of CKSEL3..0 results in internal RC Oscillator at 1 MHz. See
Table 3 on page 24 for details.
3. The CKOPT Fuse functionality depends on the setting of the CKSEL bits. See “Sys-
tem Clock and Clock Options” on page 22 for details.
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are
locked if Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the
Lock bits.
Table 50. Fuse High Byte
Fuse High Byte Bit No Description Default Value
7 – 1 (unprogrammed)
6 – 1 (unprogrammed)
5
–
1 (unprogrammed)
RSTDISBL
(2)
4
Select if PB7 is I/O pin or
RESET pin
1 (unprogrammed, PB7 is
RESET pin)
SPIEN
(1)
3
Enable
Serial Program
and Data Downloading
0 (programmed, SPI prog.
enabled)
EESAVE 2
EEPROM memory is
preserved through the Chip
Erase
1 (unprogrammed, EEPROM not
preserved)
BODLEVEL 1
Brown out detector trigger
level
1 (unprogrammed)
BODEN 0
Brown out detector enable
1 (unprogrammed, BOD
disabled)
Table 51. Fuse Low Byte
Fuse Low Byte Bit No Description Default Value
PLLCK 7 Use PLL for internal clock 1 (unprogrammed)
CKOPT
(3)
6 Oscillator options 1 (unprogrammed)
SUT1 5 Select start-up time 1 (unprogrammed)
(1)
SUT0 4 Select start-up time 0 (programmed)
(1)
CKSEL3 3 Select Clock source 0 (programmed)
(2)
CKSEL2 2 Select Clock source 0 (programmed)
(2)
CKSEL1 1 Select Clock source 0 (programmed)
(2)
CKSEL0 0 Select Clock source 1 (unprogrammed)
(2)
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