CHINT NVF2G-S Series - Page 101

F5.11
F5.12
F5.13
F5.14
F5.15
F5.16
F5.23
F5.24
F5.27
F5.28
F5.29
F5.30
F5.31
F5.32
F5.33
F5.34
(0.000 ~ 60.000)s
(0.000 ~ 60.000)s
(0.000 ~ 60.000)s
(0.000 ~ 60.000)s
(0.000 ~ 60.000)s
(0.000 ~ 60.000)s
(0.00 ~ 10.00)s
(0.00 ~ 10.00)s
0.00V ~ F5.29
(-100.0 ～ +100.0)%
F5.27 ~ +11.00V
(-100.0 ～ +100.0)%
0.00 ~ F5.33
(-100.0 ～ +100.0)%
F5.31 ~ +11.00V
(-100.0 ～ +100.0)%
0.000s
0.000s
0.000s
0.000s
0.000s
0.000s
0.05s
0.05s
0.00V
0.0%
10.00V
100.0%
0.00V
0.0%
10.00V
100.0%
X1 terminal delay time
X2 terminal delay time
X3 terminal delay time
X4 terminal delay time
X5 terminal delay time
X6 terminal delay time
AI1 filter
AI2 filter
Minimum setting of AI1 curve
Corresponding setting of AI1
curve minimum reference
AI1 curve maximum setting
AI1 curve maximum given
Minimum setting of AI2 curve
AI2 curve minimum given
corresponding setting
AI2 curve maximum setting
AI2 curve maximum given
F5.07
F5.08
F5.10
F5.09
Setting range: 0x0000 ~ 0x001F
Binary settings:
0: normal logic, conduction is valid
1: Logical inversion, valid when disconnected
Units:
BIT0～BIT3:X1～X4
ten digits:
BIT0:X5
BIT1:X6
BIT2～BIT3: Reserved
(0.000 ~ 1.000)s
(0.001~65.535)Hz/s
0: Two-wire control mode 1
1: Two-wire control mode 2
2: Three-wire control mode 1
3: Three-wire control mode 2
0x0000
0.010s
1.000Hz/s
0
Valid state setting of input
terminal (X1～X6)
Input terminal filter time
Terminal UP/DN rate
Terminal control mode selection
F5.17
F5.18
F5.19
F5.20
F5.21
F5.25
F5.26
F5.35
F5.36
F5.37
F5.38
F5.39
F5.40
F5.41
F5.42
F5.43
F5.44
F5.22
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
reserve
reserve
reserve
reserve
reserve
reserve
reserve
reserve
reserve
reserve
reserve
reserve
reserve
reserve
reserve
reserve
reserve
reserve
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
function
code
name
Parameter Description
Defaults
Change
093
NVF2G-S Series Inverter User's Guide