Cinterion DSB75 - Block Diagram

DSB75 Development Support Board Rev. B1 Hardware Description
Confidential / Released

DSB75_hd_v12 Page 20 of 96 2008-08-26
2.4 Block Diagram
Charging
ASC1
5V
DC/DC
SIM
8 pin
BATT+
Adj. Reg.
Feeding
Bridge
PSU 9V
USB-OTG
Chip
Handset
AGND
ASC2 (Debug)
I
RS232
EN
4x
I
RS232
SD
EN
3x
ASC0
Level
Shifter
2x
11x
EN
I
2x
IGT
EMRG_RST
EEPROM
DAI
10pin
ge
Hirose
USB B
Feeding
Bridge
SD-Card
AGND
USB Mini A/B
Charger,
Headset
SIM
AGND
2
x
I
RS232
EN
EMC
8x
EMC
12x
EN
I
SMA
I2C
10pin
Switch
/8
3V3-4V5
/1
/2 EP1(N,P)
EP2(N,P)
3V3-4V5
MIC1(N,P)
Charge
ADC (MUX)
Charge
ext. Supply
Audio
Audio
Audio1
Audio1
Audio2
Audio2
/1
Reset
On
BATT+
RTC Supply
SIM
USB
SD / GPIO
ASC1
ASC0
USC
I2C
DAC (PWM)
PWR_IND
PWR_IND
BATT+
/5
VDD
/6
CCxxx
/2
BATTEMP/1
ASC2/GPIO
Charge
/3 CHARGEGATE, VSENSE, ISENSE
RXD1, TXD1, RTS1, CTS1
SYNC/1SYNC
/2
I2CCLK, I2CDAT
/8
SD_xxx(GPIO1-6)
SPICS, SPIDI
/4
/7
USC(0:6)
RXD2_GPIO9, TXD2_GPIO10
/2
/2
/2
ADC(1,2)_IN
/4
/2
5V
/1
/2
RXD0 ... RING0
/8
IGT
/2
VMIC
/1
EMERG_RST
/6
/6
/1
VCHARGE
/1
VEXT/1
DAC_OUT/1
MIC2(N,P)
/2
/4
VDD
5V
/9
/4
/7
/3 USB_DN, USB_DP, VUSB_IN
VDDLP
DTR
Analog baseband
Digital baseband processor
GSM module
80 pole B2B
RF
Battery
(Screw terminal)
Test points
2x40 pole
RF Cable
RXD0,TXD0
RTS0,CTS0,RING0,DCD0,DSR0,DTR0
USC(1,2)
(RXD0,TXD0)_I
VDD
5V
SPI1/2
2x10pin
SPI1_CS, SPI1_DI
d/dt
DTR
VBUS_B
SD_DET(GPIO7),
SD_WP(GPIO8)
SD
/4
AGND
VEXT
SDXX_I
SPI2_CS,
SPI2_DI
/2
for future use
VDD
10x
VDD
/2
SD_DET(GPIO7),
SD_WP(GPIO8)
/6
/4
/8
/4
3V0
VDD
EN
LDO
LDO
PWR_IND
gn
/1
JP
JP
EN1
EN2
SD
EN2
SD
SD
SD
SD
SD
EN2
EN1
JP
5V
2x
PWR_IND
VBUS_B
5V
TP_ENV
/1
SD / GPIO