Cinterion DSB75 - Circuit Diagrams of DSB75; Figure 49: Schematic of Page Signals

DSB75 Development Support Board Rev. B1 Hardware Description
Confidential / Released

DSB75_hd_v12 Page 86 of 96 2008-08-26
9.2 Circuit Diagrams of DSB75
06.07 .2004
netlist1
VUSB_3V3
/sheet1 9 B /sheet1 1 0 C
VUSB_IN
/sheet1 2 G /sheet1 4 B /sheet1 5 C
1:1
TOP HIER ARCHY LEVEL DSB75 B1 SCHEMATIC
/sheet1 2 F
VDDL P
/sheet1 2 B /sheet1 2 E /sheet4 1 F
VDD_ EN
/sheet4 1 3 A /sheet2 8 E
VEX T
/sheet1 3 E /sheet1 2 B /sheet5 9 D
VMIC
/sheet1 4 B /sheet1 3 F /sheet7 8 B
VMIC_I
/sheet7 8 B /sheet7 6 B
VSE NSE
/sheet1 4 B /sheet1 3 F /sheet6 5 B
VSI M
/sheet6 4 E
ADC1_IN
/sheet1 4 D /sheet1 2 G /sheet5 10 B
ADC2_IN
/sheet1 4 C /sheet1 2 G
3V0
/sheet1 10 E /sheet4 2 D /sheet4 6 D /sheet4 3 B /sheet4 8 B /sheet2 12 C /sheet2 5 A /sheet2 8 E /sheet2 1 D /sheet2 12 A /sheet2 12 A /sheet1 2 E /sheet6 2 D
CCCLK
/sheet1 4 B
/sheet1 2 F /sheet5 6 B
CCGND
/sheet1 1 F
/sheet2 2 A /sheet2 9 E /sheet2 8 D /sheet2 12 C /sheet2 5 D /sheet2 6 E /sheet2 9 F
3V3 _4V 5
/sheet6 4 D /sheet4 11 A
5V0
/sheet7 10 B /sheet7 8 A /sheet7 11 F /sheet5 4 C /sheet5 7 D /sheet4 7 A /sheet4 13 A /sheet4 4 B
5V0 _I
/sheet7 11 C /sheet7 12 B
6V6
/sheet7 7 A
/sheet2 10 B /sheet2 5 B
CTS1
/sheet1 2 C /sheet1 3 E /sheet3 3 D /sheet2 5 E
CTS1_ I
/sheet5 10 B
AGND
/sheet1 2 C /sheet1 3 F /sheet7 8 C
AGND_I
/sheet7 8 C /sheet7 6 C
ASC_EN1
/sheet2 12 B /sheet2 9 E
ASC_EN2
/sheet2 12 C /sheet2 9 F
ASC_SD
/sheet2 1 F /sheet2 12 A /sheet2 12 C
BATT+
/sheet1 4 D /sheet6 5 B /sheet6 4 D
BATTEM P
/sheet1 2 C
/sheet2 13 B
DTR0
/sheet1 2 B /sheet1 3 E /sheet2 10 B /sheet2 6 B
EMERG_RST
/sheet1 2 C /sheet1 2 D /sheet5 4 B /sheet5 4 B /sheet5 6 B /sheet5 6 B
CCIN
/sheet1 4 A /sheet1 2 F /sheet5 6 B
CCIO
/sheet1 4 A /sheet1 2 F /sheet5 6 B
CCRS T
/sheet1 4 A /sheet1 2 F /sheet5 6 B
CHAR GEGAT E
/sheet1 2 B /sheet1 2 E /sheet6 1 C
CTS0
/sheet1 2 C /sheet1 3 E
EP P2
/ sheet 1 4 B / sheet 1 3 F / sheet 7 4 E
EP P2_I
/ sheet 7 5 E / sheet 7 6 C
GPI O10_ I
/sheet3 5 D /sheet2 9 D
DAC _OU T
/sheet1 4 D /sheet1 3 G /sheet5 7 A
DCD0
/sheet1 2 C /sheet1 3 E /sheet2 10 B /sheet2 5 B
DM_B
/sheet1 5 C /sheet1 11 A
DP_ B
/sheet1 5 D /sheet1 11 A
DSR 0
/sheet1 2 B /sheet1 3 E /sheet2 10 B /sheet2 5 B
DTR
/sheet4 1 F
/ sheet 4 2 E
SP ICS _I
/ sheet 4 12 F / sheet 4 14 F
SP I1_CS
/ sheet 5 7 C / sheet 4 12 E
SP IDI
/sheet1 3 F /sheet1 7 B
/ sheet 4 1 G
EP N1
/ sheet 1 4 A / sheet 1 3 F / sheet 7 4 F
EP N1_I
/ sheet 7 5 F / sheet 7 8 D
EP N2
/ sheet 1 4 B / sheet 1 3 F / sheet 7 4 E
EP N2_I
/ sheet 7 5 E / sheet 7 6 D
EP P1
/ sheet 1 4 A / sheet 1 3 F / sheet 7 4 E
EP P1_I
/ sheet 7 5 E / sheet 7 8 D
/ sheet 5 5 D
I2C_CLK_5V
/ sheet 5 5 C / sheet 5 7 C
I2C_DAT_3V
/ sheet 5 7 C / sheet 5 7 C / sheet 5 5 D
/ sheet 4 14 G / sheet 4 12 G
GPI O1_I
/ sheet 4 12 C / sheet 4 14 C
GPI O2_I
/ sheet 4 12 D / sheet 4 14 D
GPI O3_I
/ sheet 4 14 D / sheet 4 12 D
GPI O4_I
/ sheet 4 12 E / sheet 4 14 D
GPI O5_I
/ sheet 4 14 E / sheet 4 12 E
GPI O6_I
/ sheet 4 12 E / sheet 4 14 E
SP ICS
/ sheet 1 4 C / sheet 1 3 G / sheet 4 12 F
/ sheet 7 6 C
MIC P1
/ sheet 1 2 D / sheet 1 3 F / sheet 7 4 G
MIC P1_I
/ sheet 7 5 G / sheet 7 8 C
/ sheet 1 4 C / sheet 1 2 G / sheet 4 12 F / sheet 4 2 E
SPIDI_I
/ sheet 4 14 F / sheet 4 12 F
SPI1_DI
/ sheet 5 7 C / sheet 4 12 F
GPIO9_I
/ sheet 4 12 F / sheet 4 14 F
I2CCLK
/ sheet 1 4 B / sheet 1 2 G / sheet 5 1 C
I2CDAT
/ sheet 1 4 B / sheet 1 3 G / sheet 5 1 D
I2C_CLK_3V
/ sheet 5 7 C / sheet 5 7 C
/sheet1 3 E /sheet2 1 0 B /sheet2 5 B
RT S1
/sheet1 2 C /sheet1 3 E /sheet3 3 C /sheet2 5 E
I2C_DAT_5V
/ sheet 5 7 C / sheet 5 5 D
IGT
/ sheet 1 2 C / sheet 1 3 F / sheet 4 1 F
ISENSE
/ sheet 1 4 B / sheet 1 2 F / sheet 6 5 B
MICN1
/ sheet 1 2 D / sheet 1 3 F / sheet 7 4 G
MICN1_I
/ sheet 7 5 G / sheet 7 8 D
MICN2
/ sheet 1 4 A / sheet 1 3 F / sheet 7 4 F
MICN2_I
/ sheet 7 5 F
RXD2_ I
/sheet4 1 2 F /sheet2 9 D
SD_CL K
/sheet1 4 B /sheet1 2 G /sheet4 2 E /sheet4 11 E
MIC P2
/ sheet 1 2 D / sheet 1 3 F / sheet 7 4 F
MIC P2_I
/ sheet 7 5 F / sheet 7 6 C
POWER
/sheet6 1 A /sheet6 4 E
PWR_IND
/sheet1 4 D /sheet1 3 G /sheet4 2 D /sheet2 5 E /sheet2 5 B /sheet2 9 E
RING0
/sheet1 2 B /sheet1 3 E /sheet2 1 0 B /sheet2 5 B
RT S0
/sheet1 2 B
SD_D1_I
/sheet 4 12 D /sheet 3 3 D
SD_D2
/sheet 1 4 C /sheet 1 3 G /sheet 4 2 E /sheet 4 11 D
RT S1_ I
/sheet3 5 C /sheet2 1 0 D
RXD0
/sheet1 2 B /sheet1 2 E /sheet2 9 B
RXD0_ I
/sheet2 1 0 B /sheet2 7 B /sheet2 5 B
RXD1
/sheet1 2 C /sheet1 2 E /sheet3 2 C /sheet2 5 E
RXD1_ I
/sheet3 5 C /sheet2 9 D
RXD2_ G PIO9
/sheet1 4 C /sheet1 3 G /sheet4 11 F /sheet2 5 E
/sheet 5 7 C /sheet 3 3 C
SPI 2_DO
/sheet 5 7 C /sheet 3 3 D
SPI 2_SCLK
/sheet 5 7 C /sheet 3 3 C
SD_CL K_I
/sheet4 1 2 E /sheet3 3 D
SD_CMD
/sheet1 4 C /sheet1 2 G /sheet4 11 E /sheet4 2 E
SD_CMD_I
/sheet4 1 2 E /sheet3 3 D
SD_D0
/sheet1 4 C
/sheet 1 3 G /sheet 4 2 E /sheet 4 11 C
SD_D0_I
/sheet 4 12 C /sheet 3 3 D
SD_D1
/sheet 1 4 C /sheet 1 3 G /sheet 4 2 E /sheet 4 11 D
TXD2_GPIO10
/sheet1 4 C /sheet1 2 G /sheet4 11 G /sheet2 5 E
TXD2_I
/sheet4 12 G /sheet2 10 D
SD_D2_I
/sheet 4 12 D /sheet 3 3 E
SD_D3
/sheet 1 4 C /sheet 1 3 G /sheet 4 2 E
/sheet 4 11 D
SD_D3_I
/sheet 4 12 D /sheet 3 3 D
SD_DET
/sheet 1 4 C /sheet 1 2 G /sheet 3 3 C
SD_WP
/sheet 1 4 C /sheet 1 2 G /sheet 3 3 D /sheet 3 8 C
SPI 2_CS
/sheet 5 7 C /sheet 3 3 B
SPI 2_DI
/sheet1 2 F /sheet7 11 F
USC4
/sheet1 2 D /sheet1 2 F /sheet7 11 F
USC5
/sheet1 4 B
SYNC
/sheet 1 2 C /sheet 1 2 E /sheet 5 10 C /sheet 2 5 E
TP_ENV
/sheet 1 4 C /sheet 1 3 G
TXD0
/sheet 1 2 B /sheet 1 2 E /sheet 2 9 B
TXD0_I
/sheet 2 7 B /sheet 2 10 B /sheet 2 5 B
TXD1
/sheet1 2 B /sheet1 2 E /sheet3 2 B /sheet2 5 E
TXD1_I
/sheet3 5 B /sheet2 10 D
/sheet5 7 D /sheet4 1 5 A /sheet4 1 5 C /sheet4 2 B /sheet3 2 B /sheet3 9 C /sheet2 9 C /sheet2 6 B
USB_DN
/sheet1 4 B /sheet1 5 C /sheet1 3 F
USB_DP
/sheet1 4 B /sheet1 5 D /sheet1 3 G
USC0
/sheet1 2 C /sheet1 2 F /sheet7 11 F
USC1
/sheet1 2 C /sheet1 2 F /sheet7 11 F /sheet2 9 B
USC2
/sheet1 2 C /sheet1 2 F /sheet7 11 F /sheet2 9 B
USC3
/sheet1 2 C
/sheet1 4 A /sheet5 6 B
VUSB
/sheet1 7 C /sheet1 1 2 C /sheet1 1 2 C /sheet1 1 0 C /sheet4 5 B
/sheet1 2 F /sheet7 11 F
USC6
/sheet1 4 B /sheet1 2 F /sheet7 11 F
VBAT
/sheet6 2 D /sheet6 4 D
VBUS_B
/sheet1 7 C /sheet1 14 A
/sheet4 1 F
VCHARGE
/sheet1 2 B /sheet1 2 E /sheet6 5 A
VDD
/sheet7 11 F /sheet5 7 C /sheet5 1 B /sheet5 3 C /sheet5 2 B
/sheet5 4 D
Cinterion
DATE USER
APPR'D
E
D C
B
A
109
8
76543
2
1
A B
C D E
Figure 49: Schematic of page signals