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Delta AH500 - Chapter 9 Ethernet Communication Module AH10;15 EN-5 A

Delta AH500
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Chapter 6 Applied Instructions
6-163
API
Instruction code Operand Function
0704 MTR
S, D
1
, D
2
, n
Matrix input
Device
X Y M S T C HC D L SM SR E PR K 16# “$” DF
S
D
1
D
2
n
Pulse instruction 16-Bit instruction (9 steps) 32-Bit instruction
AH500
Symbol:
S
Initial input device in the matrix scan Bit
D
1
Initial output device in the matrix scan Bit
D
2
Initial corresponding device in the matrix
scan
Bit
n
Number of rows which are scanned Word
Explanation:
1. S specifies the initial input device in the matrix scan. The eight devices starting from the device
specified by S are the input devices in the matrix scan.
2. D
1
specifies the transistor output device Y as the initial device in the matrix scan. When the
conditional contact is OFF, the states of the n devices starting from D
1
are OFF.
3. One row of inputs is refreshed every scan cycle. There are 16 inputs in a row, and the scan
starts from the first row to the n
th
row.
4. The eight input devices starting from the device specified by S are connected to the n output
devices starting from the device specified by D
1
to form the n rows of switches. The states of
the n rows of switches are read in the matrix scan, and stored in the devices starting from the
device specified by D
2
.
5. When the instruction is used, users can connect at most 8 rows of input switches in parallel to
get 64 inputs (8×8=64).
6. The interval between the time when the instruction is executed and the next time when it is
executed should be longer than the time it takes for the states of the I/O points on the module
to be refreshed. Otherwise, the correct states of the inputs can not be read.
7. Generally, the conditional contact used in the instruction is the normally-open contact SM400.
8. The operand n should be within the range between 2 and 8.
Example 1:
1. When M0 is ON, the instruction MTR is executed. The states of the two rows of switches are
read in order, and stored in the internal relays M10~M17 and M20~M27 respectively.
2. The diagram below is the external wiring diagram of the 2-by-8 matrix input circuit which is

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