evertz 5700ACO - Balanced DARS, AES1, AES2 and Analog Audio Outputs*; Video Test Signal Generator Outputs; LTC and GPIO Connections

5700ACO
Automatic Changeover
Revision 1.0 Page 3
3G/HD/SD EQ, VIDEO
SYNC Slicer, 10MHz,
WORDCLOCK Slicer
3G/HD/SD EQ, VIDEO
SYNC Slicer, 10MHz,
WORDCLOCK Slice
AES/DARS Rx
AES/DARS Rx
3G/HD/SD (8),
SYNC (6),
ATG(2), 10MHz,
WORDCLOCK,
UNBAL. AES (2)
UNBAL.DARS
Inputs
BALANCED AES (2),
BALANCED DARS,
ANALOG AUDIO (2)
Inputs
A
B
3G/HD/SD (8),
SYNC (6), ATG(2),
10MHz,
WORDCLOCK,
UNBAL. AES (2)
UNBAL.DARS
Outputs
BALANCED AES (2),
BALANCED DARS,
ANALOG AUDIO (2)
Out
Latching
Relays
VistaLINK
TM
Interface
A
B
GPO
Interface
Format Validation
GPIO Processor
Selector Guide
Latching
Relays
A
B
Internal
termination
(not on 3G/
HD/SD)
LTC/IRIG (2), GPI (2)
Inputs
GPO from processor (2),
GPI from Inputs(2)
Out
LTC Slicer, GPI
LTC Slicer, GPI
LTC/IRIG
(2) Out
CPU
Latching
Relays
Latching
Relays
COM
(RS232)
LTC/IRIG
In
6 dB
attenuatorn
on 3G/HD/
SD
Figure
1-1 : 5700ACO Block Diagram