System I/O addresses 89
03F0 - 03F5 6 bytes Diskette channel 1
03F6 1 byte Primary IDE channel command port
03F8 - 03FF 8 bytes COM1
04D0 - 04D1 2 bytes Edge/level triggered PIC
0CF8 - 0CFB** 4 bytes PCI configuration address register
0CF9*** 1 byte Turbo and reset control register
0CFC - 0CFF 4 bytes PCI configuration data register
E800 - E8FF 256 bytes ICH2 audio controller
EF00 - EF3F 64 bytes ICH2 audio bus master
FFA0 - FFA7 8 bytes Primary bus master IDE registers
FFA8 - FFAF 8 bytes Secondary bus master IDE registers
96 contiguous bytes starting on a 128-byte divisible
boundary
ICH2 (ACPI + TCO)
64 contiguous bytes starting on a 64-byte divisible
boundary
D810eGB board resource
64 contiguous bytes starting on a 64-byte divisible
boundary
ICH2 LAN controller
32 contiguous bytes starting on a 32-byte divisible
boundary
ICH2 (USB controller #1)
32 contiguous bytes starting on a 32-byte divisible
boundary
ICH2 (USB controller #2)
96 contiguous bytes starting on a 128-byte divisible
boundary
LPC47M102 I/O controller
Address (hex) Size Resource
* Default
** Double-word (Dword) access only
*** Byte access only
8506999.book Page 89 Friday, December 15, 2000 8:22 AM
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