88 Reference Data
System I/O addresses
The following table shows the location in I/O space of all directly
I/O-accessible registers.
Address (hex) Size Resource
0000 - 000F 16 bytes DMA controller
0020 - 0021 2 bytes Programmable Interrupt Control (PIC)
0040 - 0043 4 bytes System timer
0060 1 byte Keyboard controller byte-reset IRQ
0061 1 byte System speaker
0064 1 byte Keyboard controller, CMD / STAT byte
0070 - 0071 2 bytes System CMOS / Real Time Clock (RTC)
0072 - 0073 2 bytes System CMOS
0080 - 008F 16 bytes DMA controller
0092 1 byte Fast A20 and PIC
00A0 - 00A1 2 bytes PIC
00B2 - 00B3 2 bytes Reserved
00C0 - 00DF 32 bytes DMA
00F0 1 byte Numeric data processor
0170 - 0177 8 bytes Secondary IDE channel
01F0 - 01F7 8 bytes Primary IDE channel
0228 - 022F* 8 bytes LPT3
0278 - 027F* 8 bytes LPT2
02E8 - 02EF* 8 bytes COM4 / video (8514A)
02F8 - 02FF* 8 bytes COM2
0376 1 byte Secondary IDE channel command port
0377, bits 6:0 7 bits Secondary IDE channel status port
0378 - 037F 8 bytes LPT1
03B0 - 03BB 12 bytes Intel 82810e—DC100 graphics/memory
controller hub (GMCH)
03C0 - 03DF 32 bytes Intel 82810e—graphics/memory controller
hub (GMCH)
03E8 - 03EF 8 bytes COM3
* Default
** Double-word (Dword) access only
*** Byte access only
8506999.book Page 88 Friday, December 15, 2000 8:22 AM
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