IDEC FT1A Series User Manual

10: U SER C OMMUNICATION I NSTRUCTIONS
10-28 S MART AXIS P RO /L ITE U SER ' S M ANUAL FT9Y-B1378
BCC Calculation Examples
The SmartAXIS can use three new BCC calculation formulas of ADD-2comp, Modbus ASCII, and Modbus RTU for transmit
instructions TXD2 and TXD3 and receive instructions RXD2 and RXD3. These block check characters are calculated as described
below.
ADD-2comp
Add the characters in the range from the BCC calculation start position to the byte immediately before the BCC, then invert the
result bit by bit, and add 1.
1. Add the characters in the range from the BCC calculation start position to the byte immediately before the BCC.
2. Invert the result bit by bit, and add 1 (2’s complement).
3. Store the result to the BCC position according to the designated conversion type (Binary to ASCII conversion or No conversion)
and the designated quantity of BCC digits.
Example: Binary to ASCII conversion, 2 BCC digits
When the result of step
2 is 175h, the BCC will consist of 37h, 35h.
Modbus ASCII — Calculating the LRC (longitudinal redundancy check)
Calculate the BCC using LRC (longitudinal redundancy check) for the range from the BCC calculation start position to the byte
immediately before the BCC.
1. Convert the ASCII characters in the range from the BCC calculation start position to the byte immediately before the BCC, in
units of two characters, to make 1-byte hexadecimal data. (Example: 37h, 35h → 75h)
2. Add up the results of step 1.
3. Invert the result bit by bit, and add 1 (2’s complement).
4. Convert the lowest 1-byte data to ASCII characters. (Example: 75h → 37h, 35h)
5. Store the two digits to the BCC (LRC) position.
If the BCC calculation range consists of an odd number of bytes, the BCC calculation results in an indefinite value. Modbus
protocol defines that the BCC calculation range is an even number of bytes.
Modbus RTU — Calculating the CRC-16 (cyclic redundancy checksum)
Calculate the BCC using CRC-16 (cyclic redundancy checksum) for the range from the BCC calculation start position to the byte
immediately before the BCC. The generation polynomial is: X
16
+ X
15
+ X
2
+ 1.
1. Take the exclusive OR (XOR) of FFFFh and the first 1-byte data at the BCC calculation start position.
2. Shift the result by 1 bit to the right. When a carry occurs, take the exclusive OR (XOR) of A001h, then go to step 3.
If not, directly go to step 3.
3. Repeat step 2, shifting 8 times.
4. Take the exclusive OR (XOR) of the result and the next 1-byte data.
5. Repeat step 2 through step 4 up to the byte immediately before the BCC.
6. Swap the higher and lower bytes of the result of step 5, and store the resultant CRC-16 to the BCC (CRC) position. (Example:
1234h → 34h, 12h)

IDEC FT1A Series Specifications

General

Brand	IDEC
Model	FT1A Series
Category	Controller
Language	English