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Intel 8080 - B3_Page_19

Intel 8080
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XCH<:;
Chapter
3.
Instruction
Set
HIGH
or
LOW
operator to specify which byte of the address
is
to
be
used
in
the evaluation of
the
expression.
When neither
operator
is
present, the assembler assumes the
LOW
operator
and issues an error message.
a
Cycles:
Sta
tes:
Addressing:
Flags:
Example:
a a
2
7
immediate
Z,S,P,CY,AC
Assume
that
the accumulator contains the value 9 when the instruction SUI 1
is
executed:
;\c(umulator
I Tlrnediate data (2'5 camp)
00001001 =
9H
11111111
=-lH
00001000 =
8H
Notice that this
two's
complement addition results
in
a carry. The
SUI
instruction complements the carry
generated
by
the addition to form a
'borrow'
flag. The flag settings r'esulting from this operation are as follows:
Carry
a
Sign
a
Zero
a
Parity
a
f\UX.
Carry
EXCHANGE
HAND
L
WITH
D
AND
E
XCHG
exchange~
the content',
of
the
Hand
L registers with
the
contents
of
the D and E registers.
Op
co de
Operand
XCHG
Operand,
are not allowed with the XCHG instruction.
XCHG
both saves the
current
Hand
L and load" a new addre.,., into the
Hand
L register'
•.
Since XCHG
i"
a
register·to·regi,tcr
instruction,
it
provides the quickest means
of
saving
and/or
altering the
Hand
L registers.
Cycles:
Sta
tes:
Addressing:
Flags:
a a
4
register
none
3-65

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