Intel 8080 - B5_Page_01

Appendix A. Instrl1ction Sl1mmary
The following is a summary of the instruction set:
8080/85 CPU INSTRUCTIONS IN OPERATION CODE SEQUENCE
~If'
OP
OP
CODE
MNEMONIC CODI'.
MN EMON IC
CODE MNEMONIC
OP
CODE
r---
00
NOP 2B
DCX
H
56
MOV
D,M
81
CI
LXI B,DI6 2C
INR L
57 MOV
D,A 82
02
ST A X B 2D
DCR L
58
MOV E,B
83
03 INX
B
2E MVI
L,D8
59
MOV E,C
84
04 INR
B
2f
CMA
'iA
MOV
E,D 85
05
DCR
B
30 SIM
'iB
MOV E,E
86
06 MVI B,D8 31
LXI
Sf'D 16
5C MOV E,H 87
07
RIC 32
5TA Ad.-
5D
MOV E,I
88
08
33 INX
SP
5E MOV I'.,M
89
09
DAD B 34
INR
M
Sf MOV E,A 8A
OA IDAXB
35
DCR
M
60
MOV
H,B
88
OB
DCX B 36 MVI
M ,Ilk
61 MOV H,C
8e
OC
INR
c:
37
STC
62
MOV H,D
8D
OD
DCR C 38 63
MOV
H,E 81::
01'. MVI
CD8 39 DAD SP
64
MOV
H,H 8F
Of'
RRC 3A
LDA
Ad, 65
MOV
H,L ,0
10
38
DCX SP
66
MOV
H,M 91
I I
LXI D,D 16
3C INR
A
67
MOV
H,A 92
12
STAX D
3D
DCR A
68
MOV
L,B
93
13
INX
D
3E MVI
A ,[)8
G9
MOV L,C 94
14
INR
[)
3f'
CMC
6A
MOV L,D
95
15
DCR
D
10
MOV
B,B
6B
MOV
L,E
96
16 MVI D,D8
·11 MOV
B,C
6C
MOV L,H 97
17
RAI 12
MOV B ,I)
(,D
MOV
L,L 98
18
·13 MOV B,I::
6l
MOV L,M
99
19
DAD D
H
MOV
13,11
(,1
MOV
L ,A
9A
IA
LDAX D
4')
.\10 V
B,L
70 MOV
.\1,B
913
IB
DCX
D
46 MOV B.M
C I
MOV
M,C
9C
IC
INR E
47
MOV
8,A
72
,\10V
M,D
9D
II)
DRC E 48
MOV
C,B
73
MOV M,E.
9E
If MVI tc,D8
49 MOV
C,C
74
MOV
M,H 9F
If
RAR 4A
MOV
C,D
7'J
MOV M,L
AD
20 RIM
18
MOV
C,r-:
76 HLT Al
21
LXI
II ,n I 6
4C
MOV
C,1i
77
MOV M,A
A2
22
SHLD Ad,
4D
MOV
C,L
78
."10 V
A,B
A3
23 INX
II ·11::
MOV
C,M
79
MOV A,C
A4
24
INR
H 1f'
MOV
C,A
7A
MOV
A,IJ AS
2)
DCR H SO
MOV
D,S
78
MOV
A ,I:
A6
26 MVI
II,D8 S I
MOV
D,C
7C MOV
A,H
A7
27
DAA 52
MOV
D,D
7D
MOV A ,L
A8
28
53
MOV
D,E
IE
MOV A ,111
A9
29
DAD H 54
MOV
D,H
7F
MOV A,A
AA
2A LHLD Adr
'is
MOV
D,L
80
ADD B AB
--
D8 = constant, 0' loglcdl/al ithmctic cxpre"ion that evall1ates 016
to an 8 bit data quantity.
Adr = 16-bit address
Of'
OP
MNEMONIC
COD I:: MNI::MONIC
CODE
MNEMONIC
ADD
C AC
XRA H
D7 RST 2
ADD D AD XRA L D8 RC
ADD
E
AE XRA M
D9
ADD
H AF XRA
A DA
IC
Adr
ADD
L BO
ORA B DB
IN
D8
ADD
M 81
ORA C DC
CC Ad.-
ADD A B2
ORA D DD
ADC
B 83
ORA
E
DE
SBI D8
ADC
C 84
ORA II DF RST 3
ADC D 85
ORA L EO
RPO
ADC
E
B6 ORA M EI POP H
ADC H B7 ORA
A
1'2
IPO
Ad r
ADC
l_
138 eMf'
B
E3 XTHL
ADC
M 89 eMP
C
E4 CPO Ad.-
ADC A 8A
CM]>
D
E5
I)USH
H
SUB
B 8B eM!> E
[6 ANI
D8
SUB C BC eMP H E7 RST 4
SUB D
IlD eMf'
L 1::8
RPI'.
SUB
E 8E CMf'
M
E9
I'CHL
SU8
II BF
CMf'
A
LA I PE
Ad,
SUB
l. CO RN! EB XCHG
SUB
M CI
POP
8
LC ePE Adl
SU13
A
C2
IN!'
Ad.-
[0
S8B B Cl
IMP
Ad,
EE XRI D8
S813 C C4 eN!
Ad,
[f
RST
5
SBB D C5 PUSH
B FO
RP
SBB
L
(:Ii
ADI
D8
Fl POP
PSW
S813
H C7 R5T 0 12
IP
Ad,
5B13
L
C8 R!
Fe 3
DI
S813
1\1
C9 REI
Adr
14
CP
Adr
SBB
A
CA
II
15 PUSH PSW
ANA
13
CB F6 ORI D8
ANA C CC
Cl
Ad,
I' 7
RST
6
ANA D CD CALL
Ad,
F8
RM
ANA
E CI'.
ACI D8 F9
SPH L
ANA H CF
R5T
I fA
1M Adr
ANA
L
00
RNC
FB U
ANA
M
j)1
POP
D FC eM
Ad,
ANA
A
D2
jNC Ad r
fD
XRA B D3
OUT
D8 IE
el'l
D8
XRA C D4 CNC
Adr F f' RST
7
XRA
D DS PUSH D
XRA
[
D6
SUI D8
constant, or logical/dfithmctic cxplc,sion that evall1ates
to a 16 bit data quantity
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A-5