Datasheet, Volume 1 83
Electrical Specifications
Notes:
1. V
CCAXG
is VID based rail.
2. Unless otherwise noted, all specifications in this table are based on estimates and simulations or empirical
data. These specifications will be updated with characterized data from silicon measurements at a later
date.
3. The V
AXG_MIN
and V
AXG_MAX
loadlines represent static and transient limits.
4. The loadlines specify voltage limits at the die measured at the VAXG_SENSE and VSSAXG_SENSE lands.
Voltage regulation feedback for voltage regulator circuits must also be taken from processor VAXG_SENSE
and VSSAXG_SENSE lands.
5. PSx refers to the voltage regulator power state as set by the SVID protocol.
6. Each processor is programmed with a maximum valid voltage identification value (VID) that is set at
manufacturing and cannot be altered. Individual maximum VID values are calibrated during manufacturing
such that two processors at the same frequency may have different settings within the VID range. Note
that this differs from the VID employed by the processor during a power management event (Adaptive
Thermal Monitor, Enhanced Intel SpeedStep Technology, or Low Power States).
Table 7-7. Processor Graphics VID based (V
AXG
) Supply DC Voltage and Current
Specifications
Symbol Parameter Min Typ Max Unit Note
2
V
AXG
GFX_VID
Range
GFX_VID Range for V
CCAXG
0.2500 — 1.5200 V 1
LL
AXG
V
CCAXG
Loadline Slope 4.1 mΩ 3, 4
V
AXG
TOB
V
CC
Tolerance Band
PS0, PS1
PS2
19
11.5
mV 3, 4, 5
V
AXG
Ripple
Ripple:
PS0
PS1
PS2
±10
±10
-10/+15
mV 3, 4, 5
I
AXG
Current for Processor Graphics
core
——35 A
I
AXG_TDC
Sustained current for Processor
Graphics core
——25 A
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