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Intel SE7520BD2

Intel SE7520BD2
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Intel® Server Board SE7520BD2 Technical Product Specification Table of Contents
Revision 1.3
iii
Table of Contents
1. Introduction ..........................................................................................................................1
1.1 Purpose.........................................................................................................................1
1.2 Audience .......................................................................................................................1
1.3 Document Outline..........................................................................................................1
1.4 Additional Technical Documentation.............................................................................1
1.5 Board Usage Disclaimer................................................................................................2
2. Product Overview.................................................................................................................3
2.1 Server Board Feature Set .............................................................................................3
2.2 Server Board Illustration................................................................................................4
2.3 Mechanical Drawing......................................................................................................5
2.4 Server Board Layout .....................................................................................................6
2.5 Identifying the Version of an Intel® Server Board .........................................................8
2.6 Chipset Overview ..........................................................................................................8
2.6.1 Memory Controller Hub (MCH)..................................................................................9
2.6.2 Front Side Bus (FSB) ................................................................................................9
2.6.3 MCH Memory Sub-System Overview........................................................................9
2.6.4 PCI Express (PCIe).................................................................................................10
2.6.5 Hub Interface...........................................................................................................10
2.7 Processor Subsystem Detail .......................................................................................10
2.7.2 Multiple Processor Initialization...............................................................................12
2.7.3 Processor VRD........................................................................................................12
2.7.4 Reset Configuration Logic.......................................................................................13
2.7.5 Processor Module Presence Detection...................................................................13
2.7.6 GTL2006*................................................................................................................13
2.7.7 Common Enabling Kit (CEK) Design Support.........................................................13
2.8 Memory Sub-System Detail.........................................................................................14
2.8.1 DDR-1 266 Memory ................................................................................................15
2.8.2 DDR-1 333 Memory ................................................................................................15
2.8.3 Single-Channel Operation.......................................................................................16
2.8.4 ECC.........................................................................................................................16
2.8.5 I
2
C Bus Detail ..........................................................................................................19
2.9 PCI Sub-System Detail................................................................................................19
2.9.1 ICH5-R PCI Interface ..............................................................................................19
2.9.2 PXH.........................................................................................................................23
2.9.3 Ultra-320 SCSI Controller........................................................................................26
2.9.4 Modular RAID on Baseboard (MROMB) .................................................................26
2.10 IO Sub-System Detail..................................................................................................28
2.10.1 Server I/O ..............................................................................................................28

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