PRINCIPLES OF OPERATION
Microprocessor timing is performed by Y2, a 3.2768 MHz
crystal. The signal is internally divided by five to obtain
a bus operating frequency of 655.36kHz. This signal is pre-
sent at the AS terminal of the processor, and is used as
a control signal to strobe the lower ordered eight bits of
the address into the address latch, U16. A 655.36kHz signal
is also present at the DS terminal to act as a system clock.
7.6.2 Memory Elements
Software for the Model 263 is stored in U47, a 16K X 8
PROM. Temporary storage is afforded by U46, a 2K X 8
RAM IC. The microprocessor unit uses the RAM for tem-
porary storage.
Calibration constants, the display mode, and the IEEE-486
primary address are stored in the NVRAM,
Ul.5 and LJ41.
During the power-up cycle,
NVRAM data is transferred
to normal RAM to allow easier access during operation.
While data transmission to the ROM and RAM are done
in parallel,
NVRAM data transmission is performed
serially.
7.6.3 Device Selection
The 146805 processor can directly address only 8K bytes
of memory. The Model 263 requires greater addressing
capability, as 16K of ROM, 2K of RAM, and other memory
space requirements arr present in the system. To get
around this problem, device selection circuitry is incor-
porated with the micorcomputer.
Device selection is performed by elements of Ul8, U21, and
U40. Microprocessor unit lines used, part of the selection
process, include the AlO-Al2
address lines,
the PB6 line,
the PB7 line, and the DS line. Signals generated by this
circuitry include a line which controls the ROM chip select,
a signal line that controls the RAh4 chip select, and cti-
&try which enables the display control and IEEE-488 bus
circuits. Additional device selection signals include the
memory paging signals. Two signals divide the 16K ROM
area into 4K pages, while a third signal divides the 2K
RAM area into two lK pages.
Because of the paging scheme employed, several devices
can occupy a given address within the microprocessor’s
addressing space.
7.6.4 IEEE-466 Bus
The Model 263 has a standard IEEE-488 interface that
allows the instrument to be programmed from a system
controller. Commands can be sent over the bus to the in-
strument, and data can be requested from the instrument
as well.
The IEEE-488 interface is made up of U26, U28 and U29.
U29 is a GPIA (General Purpose Interface Adapter), while
U26 and U28 are interface bus drivers.
The GPL4 simplifies microprocessor unit interfacing to the
IEEE-488 bus because many control sequences take place
automatically. For example, when the microprocessor unit
writes to the GPL4 data output register, the handshake se-
quence is performed automatically. Without the GPL4
chip, complex microprocessor unit routines would other-
wise be required.
On the microprocessor unit side of the GI’IA, data
transmission is handled much like any other data bus tran-
saction. Microprocessor unit data access is performed
through the DO-D7 lines, while the RSO-RS2 lines (which
are connected to the three least significant address lines)
serve to select among the 14 internal registers (seven read,
seven write) of the integrated circuit. Chip selection is per-
formed by the CE line.
The output of the GPIA IC is in standard IEEE-468 for-
mat; the eight data lines (DIOl - DIOS), the three hand-
shake lines (DAV, NRFD, NDAC), and the five manage-
ment lies (ATN, REN, IFC, SRQ, and EOI) are all active
low with approximately zero volts representing a logic one.
The two IEEE-488 bus drivers, U26 and U28, are necessary
to bring the drive capability of the interface up to the re-
quirements of the IEEE-488 standard, which included pro-
visions for up to 15 devices to be connected to the bus at
one time. The outputs of the bus drivers are connected
to J2, which is a standard IEEE-488 connector.
7.6 DISPLAY CIRCUITRY
Display circuitry includes those elements necessary to con-
trol the seven and 14 segment readouts, the front panel
annunciator LEDs, and to read the front panel switches.
The display circuitry schematic may be found on drawing
number 263-116, located at the end of Section 9.
The display circuitry consists of the LED readouts (DSl
DS7), the LED annunciators (DS8 - DS22), the segment
drivers (Ul and U2) and the digit select circuitry (U4, U5
and U6). DS2 DS6 are standard %segment units, while
DS7 is a dual 14segment display.
7-11
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