440 Keysight EXG and MXG X-Series Signal Generators User’s Guide
Using the N5102A Digital Signal Interface Module for N5172B/82B with Option 003/004 and
653/655/656/657
Operating the N5102A Module in Output Mode
From this softkey menu, set all of the clock parameters that synchronize the clocks between
the N5102A module and the signal generator. You can also change the clock signal phase so
the clock occurs during the valid portion of the data. Figure 17-15 shows the clock setup
menu.
Figure 17-15 Clock Setup Softkey Menu for a Parallel Port Configuration
The top graphic on the display shows the current clock source that provides the output clock
signal at the Clock Out and Device Interface connectors. The graphic changes to reflect the
clock source selection discussed later in this procedure. The bottom graphic shows the clock
position relative to the data. The displayed clock signal will change to reflect the following:
— clocks per sample selection
— clock phase choice
— clock skew adjustment
— clock polarity selection
If the device or external clock does not match the frequency, one of the following error
messages will appear on the signal generator:
805 Digital module output FIFO overflow error; There are more
samples being produced than can be consumed at the
current clock rate. Verify that the digital module clock
is set up properly.
Inactive for a serial port configuration and the IF signal type
Active for only the Internal clock source selection
Inactive for clock rates below 25 MHz
Inactive for clock rates below
10 MHz and above 200 MHz
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