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Kyocera KM-4230

Kyocera KM-4230
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2A3/4
2-3-9
2-3-6 CCD PCB
CCDPCB
CCD
IC1
Clock driver
IC2
Emitter
follower
circuit
Emitter
follower
circuit
IC3
11 clks
Odd
Even
4 clks
IC5
IC4
Main PCB
Clock
generation
Image
processing
circuit
Figure 2-3-6 CCD PCB block diagram
The CCD PCB (CCDPCB) receives clock signals
φ
SHIFT,
φ
CLK,
φ
RS,
φ
CLP and
generate eleven signals based on those clock signals necessary to drive the CCD IC1.
When clock signals are input, the CCD IC1 outputs analog signals which are divided
into even pixel signals and odd pixel signals depending on the set density of the image,
which are transmitted to the main PCB (MPCB) via the emitter follower circuit and
differential amplifiers IC4 and IC5.
2AD-1

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