Mitsubishi Electric MELSEC iQ-R Series - Instruction Related

APPX
Appendix 5 List of Special Register Areas
689
A
Instruction related
The following is the list of special register areas relating to the instruction-related items.
No. Name Data stored Details Set by (setting
timing)
SD757 Current interrupt
priority
Current interrupt
priority
The priority for the interrupt of the interrupt program currently executed is
stored.
1 to 8:Priority for the interrupt pointer of the interrupt program currently
being executed
0: No interrupt operation (default)
S (Status change)
SD758 Interrupt disabling for
each priority setting
value
Interrupt disabling for
each priority setting
value
The interrupt priority of the interrupt program that the interrupt is disabled by
using the DI instructions (Disabling interrupt programs/Disabling interrupt
programs with specified priority or lower) and the EI instruction (Enabling
interrupt programs) is stored in this register.
1: Interrupt programs with priority 1 or lower (all priority levels) disabled
(default)
2: Interrupt programs with priority 2 or lower disabled
3: Interrupt programs with priority 3 or lower disabled
4: Interrupt programs with priority 4 or lower disabled
5: Interrupt programs with priority 5 or lower disabled
6: Interrupt programs with priority 6 or lower disabled
7: Interrupt programs with priority 7 or lower disabled
8: Interrupt programs with priority 8 or lower disabled
0: No interrupt program disabled (interrupt programs with any priority level
enabled)
S (Status change)
SD771 Specification of the
number of write
instruction
executions to data
memory
Specification of the
number of write
instruction executions
to data memory
In this register, the maximum number of the data memory writing instruction
(SP.DEVST) executions per day is specified.
When the number of data memory writing instruction executions exceeds
the value specified in this register, an error is generated.
Setting range is from 1 to 32767. If a value is set outside the range, an error
is generated during the data memory writing instruction execution.
U
SD775 Selection of refresh
processing during
the COM instruction
execution
Selection of refresh
processing during the
COM instruction
execution
In this register, whether or not each processing is executed during the COM
instruction execution is selected (Default: 0).
The specification on the SD775 is effective when SM775 is turned on.
 Refresh processing (0: Not executed, 1: Executed)
b0: I/O refresh, I/O fetch from a group out of the multiple CPU system
b1: Link refresh of the CC-Link module
b2: Link refresh of the CC-Link IE Controller Network module and
MELSECNET/H network module
b3: Intelligent function module refresh
b4: Refresh using the CPU buffer memory of the multiple CPU system
(END)
b6: Link refresh of the CC-Link IE Field Network module
 Device/label access service processing execution (0: Executed, 1: Not
executed)
b15:Device/label access service processing (communications with the
engineering tool, GOT, or other external devices)
U
SD792
and
SD793
PID limit setting (for
complete derivative)
0: Limit restriction
applied
1: No limit restriction
The limit restriction for each PID loop is specified as follows: (for the
PIDCONT instruction)
1 to 32: Loop 1 to 32
U
SD794
and
SD795
PID limit setting (for
incomplete
derivative)
0: Limit restriction
applied
1: No limit restriction
The limit restriction for each PID loop is specified as follows: (for the
S.PIDCONT instruction)
1 to 32: Loop 1 to 32
U
b15 b0b1b2b3b4∙∙∙b6b13 ∙∙∙∙∙∙
SD792
b15 b1 b0
SD793
16
32
2
18
1
17
to
to
SD794
b15 b1 b0
SD795 17
12
18
16
32
to
to