Motorola APX 2000 Detailed Service Manual

Theory of Operation: Main Board 3-11
3.1.2.5 Analog To Digital Converter
The ADC IC's front end down converts the first IF to a second IF, a 2.25 MHz signal, by mixing a
107.4MHz LO signal generated by an integrated synthesizer and external VCO with active device
U602 and resonator L604. The second IF is sampled at 18 MHz, a signal generated by an integrated
clock synthesizer and VCO device with external resonator L605.
The sampled signal is decimated by a factor of 900 to 20 kHz and converted to SSI format at the
ADC's output. The Serial Synchronous Interface (SSI) serial data waveform is composed of a 16 bit
in-phase word (I) followed by a 16 bit Quadrature word (Q). A 20 kHz Frame Synch and a 1.2 MHz
clock waveform are used to synchronize the SSI IQ data transfer to the Digital Signal Processor IC
(OMAP) for post-processing and demodulation.
3.1.3 Transmitter
The transmitter takes modulated RF from the FGU and amplifies it to the rated output power to
produce the modulated carrier at the antenna.
NOTE: Refer to Table 8-1, “List of Transceiver Schematics and Board Overlays,” on page 8-1 for a
listing of transmitter-related schematics that will aid in the following discussion.
The transmitter (Figure 3-1 on page 3-2) for the VHF/UHF1/UHF2 radio consists of one MOSFET
high power transistor for the VHF/UHF1/UHF2 band. The same topology applied for the
700/800 MHz radio (Figure 3-4 on page 3-5) where one MOSFET high power transistor is used for
the 700/800 MHz band. The high power transistor is driven by an RF driver IC that receives its input
signal from the voltage controlled oscillator. Transmitter power is controlled by a discrete power
control circuit that senses the output of a directional coupler and adjusts PA control voltage to
maintain the correct power level. The TX signals pass through the antenna switch that will provide
switching mechanism from transmit to receive path. The signal then route through each respective
harmonic filters, an embedded directional coupler and finally to the antenna.
Figure 3-11. Transmitter Block Diagram (VHF/UHF1/UHF2/900 MHz)
S
Trident IC
Synthesizer
Loop Filter
TX VCO
RX/TX
VCO
RF Switch Matrix
TX Buffer Amp
TX Driver Amplifier
Transmitter Final
FET VHF/UHF
Harmonic
LP Filter
Ref. Oscillator
Antenna Connecto
r
Directional
Coupler
Antenna
Switch
TO RX
GPS
Reverse Power
Detection
Log Amp Power Detector
Digital RF Attenuator

Motorola APX 2000 Specifications

General

IP Rating	IP67
Operating Temperature	-30°C to +60°C
GPS	Optional
Bluetooth	No
Frequency Range	700/800 MHz
Power Output	1-5 W (VHF), 1-3 W (700/800 MHz)
Channels	Up to 1, 000
Battery Life	Up to 10 hours (digital)
Digital Protocol	APCO P25
Frequency	VHF: 136-174 MHz, UHF: 380-470 MHz, 700/800 MHz: 764-870 MHz
Power	1-3W (700/800 MHz), 1-5W (VHF)