Motorola APX 2000 - Figure 3-27. Audio SSI Configuration

Theory of Operation: Controller 3-37
Figure 3-27. Audio SSI Configuration
3.2.4.8.3 ARM SPI
This SPI interface is controlled by OMAP's ARM core. Devices connected to this bus include MAKO,
display controllers and the audio CODEC.
3.2.4.8.4 DSP SPI
This SPI interface is controlled by the DSP core of the OMAP processor. This bus is used to
configure and control devices on the RF deck.
OMAP
MACE
MCBSP1
SSC 0
(Black)
SSC 1
( Red )
BLACK or
RED RX
RED RX
RED TX
CODECs
CPLD
BLACK or
RED TX
0
0
1
1
Mux A
PA 28 (GPIO)
Hi_Sec */Normal
SSC 2
(Sniffer)
RD 2
RD 0
TD 0
RD 1
TD 1
TD 3
Mux B
Keypad Board
Main Board
OMAP 1710
McBSP3 SPIF
DSP SPI
FRONT DISPLAY
MAKO
TI CODEC
ARM SPI
I2C
LIGHTING
CONTROLLERS
3
SPI_CLK
SPI_MOSI
SPI_MISO
MAKO_CS
CPLD
Inverter
I2C_SCL
I2C_SDA
COLOR_DIS_CS
SPI_DSP_CLK
SPI_DSP_MOSI
SPI_DSP_MISO
DAC_CS
EEPROM_CS
ABACUS_CS
ABACUS_CS
DSP SPI
TRIDENT
ABACUS
EEPROM
DAC
RF SECTION
CONTROLLER SECTION
CODEC_CS
I2C