LPCXpresso boards for LPC546xx/LPC540xx/LPC54S0xx families of
MCUs
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017-2019. All rights reserved.
Rev. 2.1 — 7th January 2019
(Note: Although not required for the HS USB port operation, it is recommended to check
JP11, JP12 and JP13 have a jumper in position 1-2 to enable Ethernet operation and
availability of the I/O at the Expansion connector D8.)
7.3 Host Expansion Header (J14)
This header provides connectivity from the LPC546x8/540xx/54S0xx target to a remote
Host, peripherals or other devices. Table 4 shows the connections.
Table 4. Host Expansion Header signals
PIO0-5 (default) or PIO0-4, set by JS32
1 / PIO0-14 Rev C and earlier
1 / PIO0-13 Rev D and later
1 / PIO0-13 Rev C and earlier
1 / PIO0-14 Rev D and later
This connector shares SPI interface signal connections with the SPI bridge function (i.e.
connection from the LPC546x8/540xx/54S0xx to the Link2 Debug Probe); only one of
these functions may be used at once. By default jumper JP6 is open, connection the
Flexcomm 3 SPI port to the Link2 device; install JP6 if using the SPI port on J14.
By default, solder jumpers JS15 and JS16 connect the LPC546x8/540xx/54S0xx
Flexcomm 1 I
2
C port to the Link2 device; these may be removed if they will interfere with
other devices interfaced to J14. Note there are 2.2KΩ pull-up resistors to 3.3V for these
SDA and SCL connections.
7.4 PMod Slave Expansion Header
This header provides connectivity from the LPC546x8/540xx/54S0xx target to PMod
peripherals or other devices. Table 5 shows the connections.
Table 5. PMod Slave Expansion Header signals
GPIO/SPI-SSEL out / UART CTS in
9 / PIO4-6 (default) or
PIO3-30, set by JS27
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