LPCXpresso boards for LPC546xx/LPC540xx/LPC54S0xx families of
MCUs
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017-2019. All rights reserved.
Rev. 2.1 — 7th January 2019
Buffer Power Selection
For On-board Target place in position 1-2 (default)
For Off-board Target place in position 2-3
This header (not installed by default) provides a convenient
connection point to provide external ADC positive and negative
voltages. To inject these voltages at this header SJ22 (for VREFN)
and/or SJ23 (for VREFP) need to be moved from the default 1-2
position to the 2-3 position.
This set of 3 jumpers control various selections for power
measurement:
Position 1-2 and 3-4 are in parallel with 1 ohm resistors. Current
can be measured across these jumper headers to determine
current flow into the LPC546x8/540xx/54S0xx target.
Position 5-6 (installed by default) can be left open and a current
meter connected between these pins to directly measure current
flow into the LPC546x8/540xx/54S0xx target.
Link2 (LPC43xx) force DFU boot – 2 position jumper pins.
1) Jumper open (default) for Link2 to follow the normal boot
sequence. The Link2 will boot from internal flash if image is found
there. With the internal flash erased the Link2 normal boot
sequence will fall through to DFU boot.
Jumper shunted to force the Link2 to DFU boot mode. Use this
setting to reprogram the Link2 internal flash with a new image
(using the LPCScrypt utility) or to use the MCUXpresso IDE with
CMSIS-DAP protocol.
Note that the LPCXpresso546x8/540xx/54S0xx Link2 flash is pre-
programmed with a version of CMSIS-DAP firmware by default.
Bridge / Host Expansion Header selector.
Revision B boards:
When open (default), the SPI connections from Flexcomm3 the
LPC546x8/540xx/54S0xx are driven to the Link2 Debug Probe.
Install JP6 when using the SPI interface at connector J14. Note
that this disables the Link2 SPI (bridge) probe connection.
Revision C and later boards:
When open (default), the “Bridge” UART and SPI connections from
the Link2 probe are driven to the LPC546x8/540xx/54S0xx target.
Install JP6 when using the SPI interface at connector J14 and/or
FC0 UART at P4 (FTDI). Note that this disables the Link2 SPI and
UART (bridge) probe connections.
Note that the I2C SCL/SDA connections are reversed on Rev C
and earlier boards (relative to the PMod standard). This was
corrected from Revision D onwards. See Section 7.3.
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