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NXP Semiconductors PN7462AU - Page 26

NXP Semiconductors PN7462AU
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NXP Semiconductors
UM10883
PN7462 family Quick Start Guide - Development Kit
UM10883
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2018. All rights reserved.
User manual
COMPANY PUBLIC
Rev. 1.614 May 2018
319816
26 of 120
Fig 27. Default 65x65 antenna matching diagram symmetrical
The antenna connection uses the standard tuning circuit Fig 10. The EMC filter is
typically a second order low pass filter as shown in Fig 18, and contains an inductor (L0)
and a capacitor (C0). The cut off frequency defines the overall detuning behavior as well
as the transfer function of the antenna circuit. For symmetrical (DPC) tuning, EMC filter is
designed with a cut off frequency of f
EMC
= 14,8 MHz, and the antenna impedance is
tuned to Z = 20Ω.
(4) Standard tuning circuit
Fig 28. Matching circuit principle

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