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CP1E CPU Unit Software User’s Manual(W480)
4-3 Programming Instructions...................................................................................................... 4-8
4-3-1 Basic Understanding of Instructions ...........................................................................................4-8
4-3-2 Operands ....................................................................................................................................4-9
4-3-3 Instruction Variations.................................................................................................................4-10
4-3-4 Execution Conditions ................................................................................................................4-10
4-3-5 Specifying Data in Operands .................................................................................................... 4-12
4-3-6 Data Formats ............................................................................................................................ 4-13
4-3-7 I/O Refresh Timing....................................................................................................................4-15
4-4 Constants ............................................................................................................................... 4-16
4-5 Specifying Offsets for Addresses ........................................................................................ 4-19
4-5-1 Overview ...................................................................................................................................4-19
4-5-2 Application Examples for Address Offsets ................................................................................ 4-21
4-6 Ladder Programming Precautions...................................................................................... 4-22
4-6-1 Special Program Sections.........................................................................................................4-22
Section 5 I/O Memory
5-1 Overview of I/O Memory Areas............................................................................................... 5-2
5-1-1 I/O Memory Areas.......................................................................................................................5-2
5-1-2 I/O Memory Area Address Notation............................................................................................ 5-5
5-1-3 I/O Memory Areas.......................................................................................................................5-6
5-2 I/O Bits ...................................................................................................................................... 5-7
5-3 Work Area (W) .......................................................................................................................... 5-8
5-4 Holding Area (H) ...................................................................................................................... 5-9
5-5 Data Memory Area (D) ........................................................................................................... 5-11
5-6 Timer Area (T) ........................................................................................................................ 5-13
5-7 Counter Area (C) .................................................................................................................... 5-15
5-8 Auxiliary Area (A)................................................................................................................... 5-17
5-9 Condition Flags...................................................................................................................... 5-19
5-10 Clock Pulses .......................................................................................................................... 5-21
Section 6 I/O Allocation
6-1 Allocation of Input Bits and Output Bits ............................................................................... 6-2
6-1-1 I/O Allocation...............................................................................................................................6-2
6-1-2 I/O Allocation Concepts............................................................................................................... 6-3
6-1-3 Allocations on the CPU Unit........................................................................................................6-3
6-1-4 Allocations to Expansion Units and Expansion I/O Units............................................................6-4
Section 7 PLC Setup
7-1 Overview of the PLC Setup..................................................................................................... 7-2
7-2 PLC Setup Settings ................................................................................................................. 7-3
7-2-1 Startup and CPU Unit Settings ................................................................................................... 7-3
7-2-2 Timing and Interrupt Settings......................................................................................................7-3
7-2-3 Input Constant Settings...............................................................................................................7-4
7-2-4 Built-in RS-232C Port..................................................................................................................7-5
7-2-5 Serial Option Port........................................................................................................................ 7-8
7-2-6 Built-in Inputs ............................................................................................................................ 7-11
7-2-7 Pulse Output 0 Settings ............................................................................................................ 7-13
7-2-8 Pulse Output 1 Settings ............................................................................................................ 7-14
7-2-9 Built-in AD/DA: Built-in Analog I/O Settings ..............................................................................7-16