11 High-speed Counters
11-12
CP1E CPU Unit Software User’s Manual(W480)
The high-speed counter’s PV is reset when the corresponding High-speed Counter Reset Bit (A531.00
to A531.05) goes from OFF to ON.
The CPU Unit recognizes the OFF-to-ON transition of the High-speed Counter Reset Bit only at the begin-
ning of the PLC cycle during the overseeing processes. Reset processing is performed at the same time.
The OFF-to-ON transition will not be recognized if the Reset Bit goes OFF again within the same cycle.
Additional Information
The comparison operation can be set to stop or continue when a high-speed counter is reset.
This enables applications where the comparison operation can be restarted from a counter PV of
0 when the counter is reset.
The present value of a high-speed counter can be read in the following two ways.
The PV that is stored in the following words can be read using the MOVL instruction or other instructions.
* High-speed counter 5 is not supported by E10 CPU Units.
Reading the High-speed Counter PV with a PRV Instruction
Software Reset
11-2-4 Reading the Present Value
• Value refreshed at the I/O refresh timing
→
Read PV from Auxiliary Area.
• Value updated when a ladder program is executed → Read PV by executing a PRV instruction.
Reading the Value Refreshed at the I/O Refresh Timing
Read PV Auxiliary Area word
High-speed counter 0 A271 (upper digits) and A270 (lower digits)
High-speed counter 1 A273 (upper digits) and A272 (lower digits)
High-speed counter 2 A317 (upper digits) and A316 (lower digits)
High-speed counter 3 A319 (upper digits) and A318 (lower digits)
High-speed counter 4 A323 (upper digits) and A322 (lower digits)
High-speed counter 5* A325 (upper digits) and A324 (lower digits)
Reading the Value When a Ladder Program is Executed
One cycle
Reset bit
PV reset PV not reset PV not reset PV not reset
@PRV
#0010
#0000
D100
15 0
D100
D101
C1: Port specifier (example for high-speed counter input 0 (fixed))
C2: Control data (for reading PV)
S: First destination word
PV data lower bytes
PV data upper bytes
High-speed counter PV that was read
Execution condition