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Omron CS1W-CRM21 - Details of Slave Unit Allocation in I;O Memory

Omron CS1W-CRM21
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119
Allocations to Slave Units Section 5-2
5-2-4 Details of Slave Unit Allocation in I/O Memory
CompoNet Network I/O data is allocated in CPU Unit I/O memory in units of
Word Slave Unit output addresses, Word Slave Unit input addresses, Bit
Slave output addresses, and Bit Slave input addresses. Node address areas
that are allocated in order of node addresses are reserved for Slave Units of
the same type. In a CompoNet Network, each Unit is allocated a node
address area of the size required for the Unit based on node address set for
the Unit.
Note A single Unit is not limited to one node address area. If a Word Slave Unit has
more than 16 points (e.g., 24 points), it is allocated more than one node
address area (e.g., two node address areas). A Bit Slave with four points is
allocated two node address areas.
Word Slave Unit Data
Allocation
Word Slave Units with no more than 16 points are allocated one word (i.e., the
node address area for the node address set for the Unit). (See note.)
Note Slave Units with 8 points are also allocated one word. They use the lower byte
of the word, and the upper byte remains not used.
Slave Units with more than 16 and no more than 32 points are allocated two
words (i.e., the area for the node address set for the Unit plus next node
address area). In the same way, below, multiple words are allocated (the set
node address area and the following node address areas) to other Slave Units
according to their sizes.
Note As long as the same words are not allocated to more than one Unit, the Input
Area and Output Area with numerically the same node address can be allo-
cated to Slave Units with different node addresses. (For example, OUT1 can
be allocated to the 16 outputs for a Slave Unit set for node address 1, and IN1
can be allocated to the 16 inputs for an Expansion Slave Unit set for node
address 0.)
Output Data Allocation
Input Data Allocation
Output Area
Word address Bit 15 Bit 0
+0 OUT0
+1 OUT1
+2 OUT2
::
+62 OUT62
+63 OUT63
Input Area
Word address Bit 15 Bit 0
+0 IN0
+1 IN1
+2 IN2
::
+62 IN62
+63 IN63

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